tsp5071n STMicroelectronics, tsp5071n Datasheet - Page 2

• Manufacturer Part Number: tsp5071n
• Description: Programmable Codec/filter Combo 2nd Generation
• Manufacturer: STMicroelectronics

TS5070 - TS5071
TS5070 PIN FUNCTIONALITY (PLCC28)
TS5070 FUNCTIONAL DIAGRAM
2/32
No.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
MCLK
Name
CCLK
BCLK
VF
TS
TS
GND
VF
FS
D
D
D
D
FS
V
VFRO
V
MR
NC
NC
CO
IL3
IL2
CS
IL5
IL4
IL1
IL0
CI
VFXI
GND
SS
R
R
X
X
CC
R
X
X
IL5
IL4
IL3
IL2
IL1
IL0
X
1
0
0
1
R
X
0
1
0
I
Ground Input (+0V)
Analog Output
Supply Input (-5V)
Not Connected
Not Connected
Digital Input or Output defined by LDR register content
Digital Input or Output defined by LDR register content
Digital input
Digital input sampled by BCLK falling edge
Digital input sampled by BCLK falling edge
Digital output (shifted out on CCLK rising edge)
Digital input (sampled on CCLK falling edge)
Digital input (clock)
Digital input (chip select for CI/CO)
Digital Input
Digital input (clock)
Digital input
Digital output clocked by BCLK rising edge
Digital output clocked by BCLK rising edge
Open drain output (pulled low by active DX0 time slot)
Open drain output (pulled low by active DX1 time slot)
Digital input
Digital input or output defined by LDR register content
Digital input or output defined by LDR register content
Digital input or output defined by LDR register content
Digital input or output defined by LDR register content
Supply input (+5V)
Analog input
INTERFACE
LATCHES
TS5070/71
HYBAL 1
HYBAL 2
HYBAL 3
TX GAIN
LATCH CONT.
LATCH DIR
BALANCE
HYBRID
FILTER
RX GAIN
VCC=+5V
Vref
VSS=-5V
TX TIME SLOT
RX TIME SLOT
Function
CTL REG.
INTERFACE
CONTROL
ENCODER
ASSIGNMENT
TIME-SLOT
D94TL135
REGISTER
REGISTER
DECODER
TX
RX
AZ
DX0
DX1
TSX0
TSX1
FSX
BCLK
FSR
DR0
DR1
MCLK
MR
CS
CCLK
CO
CI