ada4932 Analog Devices, Inc., ada4932 Datasheet - Page 21

• Manufacturer Part Number: ada4932
• Description: Low Power Differential Adc Driver
• Manufacturer: Analog Devices, Inc.

Similar to the case of a conventional op amp, the output noise
voltage densities can be estimated by multiplying the input-
referred terms at +IN and −IN by the appropriate output factor,
where:
When the feedback factors are matched, R
β2 = β, and the noise gain becomes
Note that the output noise from V
The total differential output noise density, v
square of the individual output noise terms.
Table 12 and Table 13 list several common gain settings,
associated resistor values, input impedance, and output noise
density for both balanced and unbalanced input configurations.
IMPACT OF MISMATCHES IN THE FEEDBACK
NETWORKS
As previously mentioned, even if the external feedback networks
(R
loop still forces the outputs to remain balanced. The amplitudes
of the signals at each output remain equal and 180° out of phase.
The input-to-output differential mode gain varies proportionately
to the feedback mismatch, but the output balance is unaffected.
The gain from the V
When β1 = β2 , this term goes to zero and there is no differential
output voltage due to the voltage on the V
noise). The extreme case occurs when one loop is open and the
other has 100% feedback; in this case, the gain from V
to V
The feedback loops are nominally matched to within 1% in
most applications, and the output noise and offsets due to the
V
by a large amount, it is necessary to include the gain term from
V
β1 = 0.5 and β2 = 0.25, the gain from V
the V
the output of (2.5 V)(0.67) = 1.67 V. The differential output noise
contribution is (9.6 nV/√Hz)(0.67) = 6.4 nV/√Hz. Both of these
results are undesirable in most applications; therefore, it is best
to use nominally matched feedback factors.
G
β
1
OCM
OCM
N
F

/R

OUT, dm
2( β1 − β2 )/( β1 + β2 )
G
v
R
input are negligible. If the loops are intentionally mismatched
G
OCM
to V

nOD
) are mismatched, the internal common-mode feedback
F1
N
β
R
1


pin is set to 2.5 V, a differential offset voltage is present at

G1
is either +2 or −2, depending on which loop is closed.
2
OUT, dm

R
1
β
β
G1
2



i
8

1
1
and
is the circuit noise gain.
and account for the extra noise. For example, if
v

nOi
2
R
R
G
F
OCM
β
2

pin to V
R
F2
R

G2
R
G2
OUT, dm
OCM
are the feedback factors.
OCM
goes to zero in this case.
is equal to
to V
OCM
F1
/R
nOD
OUT, dm
input (including
G1
, is the root-sum-
= R
is 0.67. If
F2
/R
OCM
G2
, β1 =
input
Rev. 0 | Page 21 of 28
Mismatched feedback networks also result in a degradation of
the ability of the circuit to reject input common-mode signals,
much the same as for a four-resistor difference amplifier made
from a conventional op amp.
As a practical summarization of the above issues, resistors of 1%
tolerance produce a worst-case input CMRR of approximately
40 dB, a worst-case differential-mode output offset of 25 mV
due to a 2.5 V V
and no significant degradation in output balance error.
CALCULATING THE INPUT IMPEDANCE FOR AN
APPLICATION CIRCUIT
The effective input impedance of a circuit depends on whether
the amplifier is being driven by a single-ended or differential
signal source. For balanced differential input signals, as shown
in Figure 57, the input impedance (R
(+D
For an unbalanced, single-ended input signal (see Figure 58),
the input impedance is
The input impedance of the circuit is effectively higher than it is
for a conventional op amp connected as an inverter because a
fraction of the differential output voltage appears at the inputs
as a common-mode signal, partially bootstrapping the voltage
across the input resistor, R
amplifier input terminals can be easily determined by noting that
the voltage at the inverting input is equal to the noninverting
output voltage divided down by the voltage divider that is formed
by R
IN
Figure 57. ADA4932-x Configured for Balanced (Differential) Inputs
F
R
and R
and −D
Figure 58. ADA4932-x with Unbalanced (Single-Ended) Input
IN
,
R
se
IN, se
G
+D
–D

in the lower loop. This voltage is present at both






IN
IN
IN
1
) is R
OCM

V
R
R
OCM
G
G
2
R
R

input, negligible V
G
G
IN, dm

R
R
G
R
G
V
OCM
F
= R
+IN
–IN

ADA4932-x
G
. The common-mode voltage at the
ADA4932-1/ADA4932-2
R
R
R
F
F
G
ADA4932-x
+V
–V
F
+ R
+V
–V

S
S
R
R






F
S
S
F
G
= 2 × R
IN, dm
OCM
) between the inputs
R
noise contribution,
G
L
.
V
V
OUT, dm
OUT, dm