ada4930-1 Analog Devices, Inc., ada4930-1 Datasheet - Page 18

• Manufacturer Part Number: ada4930-1
• Description: Ultralow Noise Drivers For Low Voltage Adcs Ada4930-1/ada4930-2
• Manufacturer: Analog Devices, Inc.

ADA4930-1/ADA4930-2
Table 11. Output Noise Voltage Density Calculations for Matched Feedback Networks
Input Noise Contribution
Differential Input
Inverting Input
Noninverting Input
V
Gain Resistor R
Gain Resistor R
Feedback Resistor R
Feedback Resistor R
Table 12. Differential Input, DC-Coupled, V
Nominal Gain (dB)
0
6
10
14
Table 13. Single-Ended Ground-Referenced Input, DC-Coupled, R
Nominal Gain (dB)
0
6
10
14
1
Table 11 summarizes the input noise sources, the multiplication
factors, and the output-referred noise density terms.
Table 12 and Table 13 list several common gain settings, associated
resistor values, input impedance, and output noise density for
both balanced and unbalanced input configurations.
IMPACT OF MISMATCHES IN THE FEEDBACK
NETWORKS
As previously mentioned, even if the external feedback networks
(R
loop still forces the outputs to remain balanced. The amplitudes
of the signals at each output remain equal and 180° out of phase.
The input-to-output differential mode gain varies proportionately
to the feedback mismatch, but the output balance is unaffected.
The gain from the V
When β1 = β2, this term goes to zero and there is no differential
output voltage due to the voltage on the V
noise). The extreme case occurs when one loop is open and the
other has 100% feedback; in this case, the gain from V
to V
feedback loops are nominally matched to within 1% in most
applications, and the output noise and offsets due to the V
input are negligible. If the loops are intentionally mismatched by a
R
OCM
G2
F
/R
= R
O, dm
Input
2(β1 − β2)/(β1 + β2)
G
G1
) are mismatched, the internal common-mode feedback
is either +2 or −2, depending on which loop is closed. The
+ (R
S
||R
T
G1
G2
).
F1
F2
OCM
pin to V
301
301
301
301
R
R
301
301
301
301
F1
F1
, R
, R
F2
F2
(Ω)
O, dm
(Ω)
Input Noise Term
v
i
i
v
v
v
v
v
nIN+
nIN−
nIN
nCM
nRG1
nRG2
nRF1
nRF2
is equal to
R
142
63.4
33.2
10.2
R
301
150
95.3
60.4
G1
OCM
G1
(Ω)
, R
input (including
S
G2
= 5 V
(Ω)
R
64.2
84.5
1 k
1.15 k
T
(Ω)
OCM
Input Noise
Voltage Density
v
i
i
v
(4kTR
(4kTR
(4kTR
(4kTR
input
OCM
nIN+
nIN−
nIN
nCM
R
190.67
95.06
53.54
17.5
R
602
300
190.6
120.4
Rev. A | Page 18 of 28
IN, cm
IN, dm
× (R
× (R
G1
G2
F1
F2
)
)
)
)
(Ω)
1/2
1/2
1/2
1/2
F2
F1
(Ω)
)
)
S
= 50 Ω, V
R
170
95
69.3
57.7
G2
large amount, it is necessary to include the gain term from V
to V
and β2 = 0.25, the gain from V
is set to 0.9 V, a differential offset voltage is present at the output of
(0.9 V)(0.67) = 0.6 V. The differential output noise contribution is
(5 nV/√Hz)(0.67) = 3.35 nV/√Hz. Both of these results are
undesirable in most applications; therefore, it is best to use
nominally matched feedback factors.
Mismatched feedback networks also result in a degradation of
the ability of the circuit to reject input common-mode signals,
much the same as for a four-resistor difference amplifier made
from a conventional op amp.
As a practical summarization of the previous issues, resistors of
1% tolerance produce a worst-case input CMRR of approximately
40 dB, a worst-case differential-mode output offset of 9 mV due
to a 0.9 V V
no significant degradation in output balance error.
INPUT COMMON-MODE VOLTAGE RANGE
The input common-mode range at the summing nodes of the
ADA4930-1/ADA4930-2 is specified as 0.3 V to 1.5 V at V
To avoid nonlinearities, the voltage swing at the +IN and −IN
terminals must be confined to these ranges.
(Ω)
O, dm
1
Output
Multiplication Factor
G
1
1
0
R
R
1
1
S
F1
F2
N
= 5 V
and account for the extra noise. For example, if β1 = 0.5
/R
/R
Differential Output Noise Density (nV/√Hz)
5.9
7.8
9.3
10.4
Differential Output Noise Density (nV/√Hz)
4.9
6.2
7.8
10.1
G1
G2
OCM
input, negligible V
OCM
to V
OCM
Differential Output Noise
Voltage Density Terms
v
v
v
v
v
v
v
v
nOD1
nOD2
nOD3
nOD4
nOD5
nOD6
nOD7
nOD8
O, dm
noise contribution, and
= G
= (i
= (i
= 0
= (R
= (R
= (4kTR
= (4kTR
is 0.67. If the V
nIN+
nIN−
N
F1
F2
(v
/R
/R
)(R
)(R
nIN
F1
F2
G1
G2
)
F2
F1
)
)
)(4kTR
)(4kTR
1/2
1/2
)
)
S
G1
G2
= 3.3 V.
OCM
)
)
1/2
1/2
OCM
pin