isd4002-150 Winbond Electronics Corp America, isd4002-150 Datasheet - Page 10

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isd4002-150

Manufacturer Part Number
isd4002-150
Description
Single-chip, Multiple-messages Voice Record/playback Devices 120-, 150-, 180-, And 240-second Duration
Manufacturer
Winbond Electronics Corp America
Datasheet

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PIN NAME
XCLK
SCLK
SOIC /
PDIP
26
28
PIN NO.
TSOP
6
8
External Clock Input : The ISD4002 series is configured at
the factory with an internal sampling clock frequency
centered to ± 1 percent of specification. The frequency is
then maintained to a variation of ± 2.25 percent over the
entire commercial temperature and operating voltage
ranges. The internal clock has a –6/+4 percent tolerance
over the industrial temperature and voltage ranges. A
regulated power supply is recommended for industrial
temperature range parts. If greater precision is required,
the device can be clocked through the XCLK pin as follows:
These recommended clock rates should not be varied
because the anti-aliasing and smoothing filters are fixed.
Otherwise, aliasing problems can occur if the sample rate
differs from the one recommended. The duty cycle on the
input clock is not critical, as the clock is immediately
divided by two. If the XCLK is not used, this input must
be connected to ground.
Serial Clock : This is the input clock to the ISD4002 device.
It
microcontoller) and is used to synchronize the data transfer
in and out of the device through the MOSI and MISO lines,
respectively. Data is latched into the ISD4002 on the rising
edge of SCLK and shifted out of the device on the falling
edge of SCLK.
is
ISD4002-120
ISD4002-150
ISD4002-180
ISD4002-240
- 10 -
Part Number
generated
by
Sample Rate
FUNCTION
8.0 kHz
6.4 kHz
5.3 kHz
4.0 kHz
the
ISD4002 SERIES
master
Required Clock
device
819.2 kHz
682.7 kHz
1024 kHz
512 kHz
(typically

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