p82b715t NXP Semiconductors, p82b715t Datasheet - Page 5

• Manufacturer Part Number: p82b715t
• Description: I2c Bus Extender
• Manufacturer: NXP Semiconductors

Philips Semiconductors
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134).
Voltages with respect to pin GND (DIL-8 pin 4).
CHARACTERISTICS
At T
Pull-Up Resistance Calculation
In calculating the pull-up resistance values, the gain of the buffer
introduces scaling factors which must be applied to the system
components. Viewing the system from the Buffered bus, all I
capacitances have effectively 10 times their I
In practical systems the pull-up resistance is determined by the rise
time limit for I
satisfied if the time constant (product of the net resistance and net
capacitance) of the total system is set to 1 microsecond.
The total time constant may either be set by considering each bus
node individually (i.e., the I
and choosing pull-up resistors to give time constants of 1
microsecond for each node; or by combining the capacitances into
an equivalent capacitive loading on the Buffered bus, and
1998 Jan 09
V
V
V
I
P
T
T
Power Supply
V
I
I
I
Drive Currents
I
I
Input Currents
I
I
I
Impedance Transformation
Z
CC
CC
CC
Sx
Lx
Sx
Lx
Lx
I
stg
amb
in
CC
bus
buff
tot
CC
2
amb
, I
, I
, I
, I
, I
/Z
SYMBOL
SYMBOL
C bus extender
Ly
Ly
Ly
Sy
Sy
to GND
out
= +25 C and V
2
C systems. As an approximation this limit will be
Supply voltage range V
Voltage range I
Voltage range Buffered Bus
DC current (any pin)
Power dissipation
Storage temperature range
Operating ambient temperature range
Supply voltage (operating)
Supply current
Supply current at V
Supply current, both I
both buffered outputs sinking 30mA.
Output sink on I
Output sink on Buffered bus
Input current from I
Input current from Buffered bus when
Leakage current on Buffered bus
Input/Output impedance
CC
= 5 Volts, unless otherwise specified.
2
C nodes, and the Buffered bus node)
V
V
V
V
I
I
V
Lx
Sx
Sx
Lx
Lx
Sx
Lx
, I
, I
, V
, V
, V
, V
, V
Ly
Sy
2
2
C Bus, SCL or SDA
Ly
Ly
Ly
Sy
Sy
C bus
sink on Buffered bus = 30mA
sink on I
LOW on Buffered bus = 0.3V
LOW = 0.4V
2
= V
CC
LOW = 0.4V
LOW on I
C bus when
2
= 12V
C inputs LOW,
CC
2
CC
C bus value.
, and V
PARAMETER
2
C bus = 3mA
2
C bus = 0.3V
Sx
PARAMETER
, V
Sy
2
C bus
= V
CC
5
calculating the Buffered bus pull-up resistor required by this
equivalent capacitance.
For each separate bus the pull-up resistor may be calculated as
follows:
Where: C
bus,
and C
If these capacitances are not known then a good approximation is to
assume that each device presents 10pF of load capacitance and
10pF of wiring capacitance.
R +
wiring
C
device
device
= total wiring and stray capacitance on each bus.
1m sec
= sum of device capacitances connected to each
) C
MIN.
4.5
30
—
—
—
—
—
—
3
8
wiring
LIMITS
MIN.
TYP.
–0.3
–55
–40
16
22
28
10
—
—
—
—
—
—
0
0
LIMITS
Preliminary specification
MAX.
MAX.
+125
V
V
+12
300
+85
200
60
12
—
—
—
—
—
13
CC
CC
3
3
82B715
UNIT
UNIT
mW
mA
mA
mA
mA
mA
mA
mA
mA
V
V
V
V
C
C
A