tw9910 ETC-unknow, tw9910 Datasheet
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... Techwell, Inc. TW9910 – Low Power NTSC/PAL/SECAM Video Decoder with VBI Slicer Data Sheet Techwell Confidential. Information may change without notice. Disclaimer This document provides technical information for the user. Techwell, Inc. reserves the right to modify the information in this document as necessary. The customer should make sure that they have the most recent data sheet version ...
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... Chrominance Low-Pass Filter Curve.................................25 Horizontal Scaler Pre- Filter curves ...................................25 Peaking Filter Curves.........................................................25 Peaking Filter Curves.........................................................26 Control Register ........................................................................27 TW9910 Register SUMMARY...........................................27 0x00 – Product ID Code Register (ID)..............................30 0x01 – Chip Status Register I (STATUS1)........................30 0x02 – Input Format (INFORM).........................................31 0x03 – Output Format Control Register (OPFORM) ........32 0x04 – ...
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... TW9910 TW9910 – Low Power NTSC/PAL/SECAM Video Decoder with VBI Slicer Features Video decoder − NTSC (M, 4.43) and PAL ( combination), PAL (60), SECAM support with automatic format detection − Software selectable analog inputs allows any of the following combinations, e.g. 4 CVBS CVBS and 1 Y/C ). − ...
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... TW9910 Functional Description Figure 1: TW9910 Block Diagram CIN 0 MUX0 MUX1 MUX2 MUX3 27 Mhz PDN RSTB SCLK SDAT TECHWELL, INC. Low Power NTSC/PAL/SECAM Video Decoder with VBI Slicer (15:8) VD(7: CLKx2 MPOUT A REV. 09/21/2006 ...
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... The output of the decoder is line-locked and formatted to the ITU-R 656 output with embedded sync. The TW9910 also includes circuits to detect and process vertical blanking interval (VBI) signal. It slices and process VBI data for output through video bus. Some information can also be alternatively retrieved through host interface ...
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... The identified standard is indicated by the Standard Selection (SDT) register. Automatic standard detection can be overridden by software controlled standard selection. TW9910 supports all common video formats as shown in Table 1. The video decoder needs to be programmed appropriately for each of the composite video input formats. ...
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... Serial clock and data lines, SCLK and SDAT, transfer data from the bus master at a rate of 400 Kbits/s. The TW9910 has one serial interface address select pin(VD[0]/SIAD0) to program up to two unique serial addresses TW9910. This allows as many as two TW9910 to share the same serial bus. Reset signals are also available to reset the control registers to their default values. ...
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... TW9910 Down-scaling and Cropping The TW9910 provides two methods to reduce the amount of output video pixel data, downscaling and cropping. The downscaling provides full video image at lower resolution. Cropping provides only a portion of the video image output. All these mechanisms can be controlled independently to yield maximum flexibility in the output stream ...
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... TW9910 Scaling Ratio Format 1:1 NTSC SQ NTSC CCIR601 PAL SQ PAL CCIR601 2:1 (CIF) NTSC SQ NTSC CCIR601 PAL SQ PAL CCIR601 4:1 (QCIF) NTSC SQ NTSC CCIR601 PAL SQ PAL CCIR601 Table 2. HSCALE and VSCALE value for some popular video formats. TECHWELL, INC. Total Output Resolution Resolution 780x525 ...
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... NTSC656 register bit controls this video active line length. Horizontal Down Scaling Output TW9910 generates Horizontal down scaling output data. Figure 2 shows 8 bit mode Horizontal Down Scaling output timing. As shown on Figure 2, Horizontal Down Scaled data are generated by continuous data stream. The trailing edge of DVALID signal changes with the trailing edge of HACTIVE signal. Data value from the leading edge of HACTIVE to the leading edge of DVALID is programmable by CNTL656 register. If CNTL656 is set to “ ...
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... Figure 2. 8 bit mode Horizontal Down Scaling Output Vertical Down Scaling Output TW9910 generates Vertical Down Scaling output data. Figure 3 shows its timing. As shown on Figure 3, HACTIVE is NOT generated on invalid line as default (VSCTL is “0”). If VSCTL is set to “1”, HACTIVE is generated on every lines during VACTIVE active period. DVALID is not generated on invalid lines in each setting. Invalid lines for Vertical down scaling are generated during VACTIVE active period. If MODE bit is set to “ ...
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... VBI Data Processing Raw VBI data output TW9910 supports raw VBI data output. Raw VBI data output has the same vertical line delay timing as video output. Horizontal output timing is also programmable by VBIDELAY register. Raw VBI data is generated during HACTIVE active period (from SAV to EAV) as Video data output. Total pixel number of raw VBI data per line is twice as many as HACTIVE register value. If VBI EN register is set to “ ...
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... TW9910 Sliced VBI Data output format After 4 bytes of EAV code, sliced VBI ANC data packets are generated by following format. Byte1 to Byte4N+7 data stream is formatted according to ITU-R BT.1364 ANC data packet type2. BC data byte is optional and not included in ANC data packet type 2 BC data byte is inserted after ANC data packet type2 ...
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... TW9910 Following shows various type of ANC data packet to be output Table 7. Closed Captioning ANC data packet BYTE No. MSB NEP NEP EP SDID5 FID LN8 8 OP LN2 LN1 NCS6 ...
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... TW9910 12 NCS6 CS6 CS5 Table 10. 625 Teletext-A ANC data packet BYTE No. MSB NEP NEP EP SDID5 FID LN8 8 OP LN2 LN1 NCS6 CS6 CS5 ...
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... TW9910 Table 12. 525 Teletext-B ANC data packet BYTE No. MSB NEP NEP EP SDID5 FID LN8 8 OP LN2 LN1 NCS6 CS6 CS5 1.FRAME CODE is 27H if it’s received correctly. ...
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... TW9910 Table 14. 625 Teletext-D and 525 Teletext-D ANC data packet BYTE No. MSB NEP NEP EP SDID5 FID LN8 8 OP LN2 LN1 NCS6 CS6 CS5 1.FRAME CODE is A7H if it’ ...
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... TW9910 Table 16. VITC ANC data packet BYTE No. MSB NEP NEP EP SDID5 FID LN8 8 OP LN2 LN1 NCS6 CS6 CS5 1.CRCERROR is CRC Error information.41H means CRC Error is deteced.80H means no CRC error. ...
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... TW9910 Table 18. Gemstar 2X ANC data packet BYTE No. MSB NEP NEP EP SDID5 FID LN8 8 OP LN2 LN1 NCS6 CS6 CS5 FRAMCODE1 is B9H if Frame Code is correctly received. ...
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... TW9910 Two Wire Serial Bus Interface Start Condition SDAT SCLK Figure 4. Definition of the serial bus interface bus start and stop SDAT SCLK Start Condition Re-start Condition Figure 5. One complete register read sequence via the serial bus interface Device ID (1-7) SDAT SCLK Start Condition Figure 6 ...
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... For both read and write, each byte is transferred MSB first, and the data bit is valid whenever SCLK is high. The TW9910 is operated as a bus slave device. It can be programmed to respond to one of two 7-bit slave device addresses by tying the SIAD (Serial Interface ADdress) pin ether to VDD or VSS (See Table 19) through a pull-up or pull-down resister ...
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... Test Modes The input pin TMODE combining with RESET# provide different test modes selection. If this pin is low at the rising edge of the RESET# pin and remaining low afterwards, TW9910 is in the normal operating mode. Other test modes can be obtained as shown in Table 20. ...
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... TW9910 Filter Curves Anti-alias filter - -25 -30 -35 - Decimation filter 0 -5 - -40 -45 - TECHWELL, INC Frequency (Hertz Frequency (Hertz) ...
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... TW9910 Chroma Band Pass Filter Curves 0 -5 -10 -15 ) NTSC - - - - -40 -45 - Luma Notch Filter Curve for NTSC and PAL/SECAM 0 - ...
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... TW9910 Chrominance Low-Pass Filter Curve 0 -5 - -40 -45 -50 0 0.5 Horizontal Scaler Pre- Filter curves HFLT[1:0]= -30 -35 -40 0 0.05 TECHWELL, INC. ...
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... TW9910 Peaking Filter Curves NTSC PAL TECHWELL, INC Frequency (Hertz) ...
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... TW9910 Control Register TW9910 Register SUMMARY Index 7 6 (HEX VDLOSS HLOCK 02 YSEL2 FC27 03 MODE LEN LLCMODE 04 GMEN CKHY 05 VSP 06 SRESET IREF 07 VDELAY_HI PBW DEM 0D 0E VSCALE_HI SCURVE - SHCOR 18 CTCOR 19 VBI_EN VBI_BYT VBI_FRAM 1A LLCTEST PLL_PDN ...
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... TW9910 Index 7 6 (HEX) 20 CLPEND 21 NMGAIN CLMPLD 25 SYNCTD 26 MISSCNT 27 28 VLCKI 29 BSHT 2A CKILMAX 2B HTL 2C CKLM 2D HPLC - 2E HPM 2F NKILL PKILL VCR WKAIR 32 33 FRM 34 IDX 35 CTEST YCLEN TECHWELL, INC. ...
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... TW9910 Index 7 6 (HEX NODAEN SYRM 52 ANCEN TOUTHA 53 CRCERR WSSFLD 54 55 HA656 EAVSW HSPIN 6F PDNSV BI TECHWELL, INC FILLDATA SDID VIPCFG WSS[13:8] WSS[7:0] HAMM84 NTSC656 LCTL6 LCTL7 ...
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... MONO R 0 DET50 R TECHWELL, INC. Description The TW9910 Product ID code is 01011. The revision number. Description 1 = Video not present. (Sync is not detected in number of line periods specified by MISSCNT register Video detected Horizontal sync PLL is locked to the incoming video source Horizontal sync PLL is not locked. ...
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... TW9910 0x02 – Input Format (INFORM) Bit Function R/W R/W Reserved Input crystal clock frequency is 27MHz. 6 FC27 0 = Square pixel mode. Must use 24.54MHz for 60Hz field rate source or 29.5MHz for 50Hz field rate source. R S-video decoding 5-4 IFSEL 00 = Composite video decoding R/W These two bits control the Y input video selection. ...
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... TW9910 0x03 – Output Format Control Register (OPFORM) Bit Function R/W R CCIR601 compatible YCrCb 4:2:2 format with separate syncs and 7 MODE R 8-bit YCrCb 4:2:2 output format. 6 LEN R LLC output mode. 5 LLCMODE R/W Serial interface auto-indexing control 4 AINC R Vertical scale-downed output controlled by DVALID only. 3 VSCTL R Enable outputs. ...
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... TW9910 0x05 – Output Control I Bit Function R/W R pin output polarity is active low 7 VSP R/W VS pin output control 6-4 VSSL R pin output polarity is active low 3 HSP R/W HS pin output control 2-0 HSSL TECHWELL, INC. Description pin output polarity is active high VSYNC 1 = VACT 2 = FIELD ...
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... TW9910 0x06 – Analog Control Register (ACNTL) Bit Function R/W 7 SRESET W R Internal current reference 1. 6 IREF R Internal voltage reference. 5 VREF R AGC loop function enabled. 4 AGC_EN R Normal clock operation. 3 CLK_PDN R Luma ADC in normal operation. 2 Y_PDN R Chroma ADC in normal operation. 1 C_PDN R/W Reserved for future use 0 0x07 – ...
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... TW9910 0x08 – Vertical Delay Register, Low (VDELAY_LO) Bit Function R/W R/W These bits are bit the 10-bit Vertical Delay register. The two 7-0 VDELAY_LO 0x09 – Vertical Active Register, Low (VACTIVE_LO) Bit Function R/W R/W These bits are bit the 10-bit Vertical Active register. The two ...
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... TW9910 0x0C – Control Register I (CNTRL1) Bit Function R/W R Wide Chroma BPF BW 7 PBW R/W Secam control 6 DEM R PAL switch sensitivity low. 5 PALSW R The black level is 7.5 IRE above the blank level. 4 SET7 R Adaptive comb filter on for NTSC 3 COMB R operation mode 1. (Recommended) 2 HCOMP R/W This bit controls the no color burst output behavior. ...
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... TW9910 0x0F – Horizontal Scaling Register, Low (HSCALE_LO) Bit Function R/W R/W These bits are bit the 12-bit horizontal scaling ratio register. 7-0 HSCALE_LO 0x10 – BRIGHTNESS Control Register (BRIGHT) Bit Function R/W R/W These bits control the brightness. They have value of –128 to 127 in ...
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... TW9910 0x13 – Chroma (U) Gain Register (SAT_U) Bit Function R/W R/W These bits control the digital gain adjustment to the U (or Cb) 7-0 SAT_U 0x14 – Chroma (V) Gain Register (SAT_V) Bit Function R/W R/W These bits control the digital gain adjustment to the V (or Cr) 7-0 SAT_V 0x15 – Hue Control Register (HUE) ...
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... TW9910 0x17 – Coring Bit Function R/W 7-4 SHCOR R/W These bits provide coring function for the sharpness control. 3 2-0 VSHP R/W Vertical peaking level none highest. 0x18 – Coring and IF compensation (CORING) Bit Function R/W R/W These bits control the coring for CTI. 7-6 CTCOR R/W These bits control the low level coring function for the Cb/Cr output. ...
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... TW9910 0x19 – VBI Control Register (VBICNTL) Bit Function R/W R VBI capture disabled. 7 VBI_EN R/W If LEN(Reg0x03[6]) is “1” 6 VBI Byte Order R Normal mode 5 VBI_ FRAM R HACTIVE output is disabled during vertical blanking period. 4 HA_EN R 0x80 and 0x10 code will be output as invalid data during active ...
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... TW9910 0x1A – Analog Control II Bit Function R/W R/W LLC test mode 7 LLCTEST R LLC PLL in normal operation. 6 PLL_PDN 5-4 R/W Y-Ch anti-alias filter control 3 YFLEN R/W Y-Ch power saving mode 2 YSV R/W C-Ch anti-alias filter control 1 CFLEN R/W C-Ch power saving mode 0 CSV 0x1B – Output Control II Bit Function R/W R/W CLKX2 pin output control. CK1S[0] together with these two bits ...
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... TW9910 0x1C – Standard Selection (SDT) Bit Function R/W 7 DETSTUS R 6-4 STDNOW R R Disable the shadow registers. 3 ATREG R/W Standard selection 2-0 STD TECHWELL, INC. Description 0 = Idle 1 = detection in progress Current standard invoked 0 = NTSC( PAL (B,D,G,H, SECAM 3 = NTSC4. PAL ( PAL (CN PAL Not valid 0 = Enable VACTIVE and HDELAY shadow registers value depending ...
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... TW9910 0x1D – Standard Recognition (SDTR) Bit Function R/W R/W Writing 1 to this bit will manually initiate the auto format detection 7 ATSTART R enable recognition of PAL60. 6 PAL6_EN R enable recognition of PAL (CN). 5 PALN_EN R enable recognition of PAL (M). 4 PALM_EN R enable recognition of NTSC 4.43. 3 NT44_EN R enable recognition of SECAM. ...
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... TW9910 0x1F – Test Control Register (TEST) Bit Function R/W R/W This register is reserved for testing purpose. In normal operation, only 7-0 TEST TECHWELL, INC. Description 0 should be written into this register Analog test mode. Y and C channel portion of the device can be tested in this mode. The Y channel ADC output can be obtained from VD[15-8] ...
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... TW9910 0x20 – Clamping Gain (CLMPG) Bit Function R/W R/W These 4 bits set the end time of the clamping pulse in the increment of 7-4 CLPEND R/W These 4 bits set the start time of the clamping pulse in the increment 3-0 CLPST 0x21 – Individual AGC Gain (IAGC) Bit Function R/W R/W These bits control the normal AGC loop maximum correction value. ...
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... TW9910 0x25– Sync Amplitude (SYNCT) Bit Function R/W R Reference sync amplitude is set by SYNCT. 7 SYNCTD 1 = Reference sync amplitude is preset to 38h. R/W These bits determine the standard sync pulse amplitude for AGC 6-0 SYNCT reference. 0x26 – Sync Miss Count Register (MISSCNT) Bit Function R/W R/W MISSCNT[3] controls the speed of VDLOSS detection with ‘0’ being ...
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... TW9910 0x28 – Vertical Control I (VCNTL1) Bit Function R/W R/W Vertical lock in time. 7-6 VLCKI R/W Vertical lock out time. 5-4 VLCKO R/W This bit controls the vertical detection window. 3 VMODE R recommended for special application only. 2 DETV R/W Auto field generation control 1 AFLD R/W Vertical integration time control. 0 VINT 0x29 – ...
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... TW9910 0x2B – Comb Filter Control (COMB) Bit Function R/W R/W Comb strength control. 1= less. 7 HTL R/W Adaptive Comb filter threshold control 1. 6-4 HTL R/W Adaptive Comb filter threshold control 2. 3-0 VTL 0x2C – Luma Delay and H Filter Control (LDLY) Bit Function R/W R/W Color Killer mode. 7 CKLM R/W Luma delay fine adjustment. This 2’s complement number provide –4 ...
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... TW9910 0x2D – Miscellaneous Control I (MISC1) Bit Function R/W R/W Reserved for Internal use. 7 HPLC R/W Reserved. 6 R/W Reserved. 5 PALC R/W ID detection sensitivity. A ‘1’ is recommended. 4 SDET R/W 1:TBC enable in freerun clock mode 3 TBC_EN R/W It controls the standard detection and should be set to ‘1’ in normal 2 BYPASS R Hsync output is disabled when video loss is detected ...
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... TW9910 0x2F – Miscellaneous Control II (MISC2) Bit Function R/W R Enable noisy signal color killer function in NTSC mode. 7 NKILL R Enable automatic noisy color killer function in PAL mode. 6 PKILL R Enable automatic noisy color killer function in SECAM mode. 5 SKILL R Normal output 4 CBAL R Force decoder output value determined by CCS. ...
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... TW9910 0x30 – Macrovision Detection (MVSN) Bit Function R CSBAD R 2 MCVSN R 1 CSTRIPE R 0 CTYPE R 0x31 – Chip STATUS II (STATUS2) Bit Function R/W 7 VCR R 6 WKAIR R 5 WKAIR1 R 4 VSTD R 3 NINTL R 2 WSSDET R 1 EDSDET ...
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... TW9910 0x32 – H monitor (HFREF) Bit Function R/W 7-0 HFREF R 0x33 – CLAMP MODE (CLMD) Bit Function R/W R/W Free run mode control 7-6 FRM R noise reduction 5-4 YNR R/W Clamping mode control. 3-2 CLMD R/W Slice level control 1-0 PSP 0x34 – ID Detection Control (IDCNTL) Bit Function R/W R/W These two bits indicate which of the four lower 6-bit registers is ...
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... TW9910 0x35 – Clamp Control I (CLCNTL1) Bit Function R/W R/W Clamping control for debugging use. 7 CTEST R channel clamp disabled 6 YCLEN R channel clamp disabled 5 CCLEN R/W Reserved 4 VCLEN R Test. 3 GTEST R/W Sync filter control 2 VLPF R/W Clamping current control 1. 1 CKLY R/W Clamping current control 2. 0 CKLC TECHWELL, INC ...
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... TW9910 0x4F – WSS3 Bit Function R/W 7-0 WSS[19:14] R 0x50 – FILLDATA Bit Function R/W R/W Filled data as dummy data in ANC Dword data packet. 7-0 FILLDATA 0x51 – SDID Bit Function R/W R/W 1:Bit7 NODAEN R/W 1: Minimum value in raw VBI will be 0x10 for Sync Level remove. 6 SYRM R/W Secondary data ID in ANC data packet type 2 ...
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... TW9910 0x53 – WSS1 Bit Function R/W 7 CRCERR R 6 WSSFLD R 5-0 WSS[13:8] R 0x54 – WSS2 Bit Function R/W 7-0 WSS[7:8] R 0x55 – VVBI Bit Function R/W R/W 1:HACTIVE signal is same as DVALID signal in H Down scaled video 7 HA656 R/W 1:EAV-SAV code is swapped. 6 EAVSWAP R/W 1:enable 84 Hamming Code checking BI Slicer.0: disable. ...
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... TW9910 0x56~6A LCTL6~LCTL26 Bit Function R/W R/W Set up VBI Data Slicer Decoding mode on Line-n. 7-4 LCTLn R/W Value is set up by below bit3-0 meaning for Line-n in even field. 3-0 0x6B – HSGEGIN Bit Function R/W R/W HSYNC Start position. 7-0 HSBEGIN 0x6C – HSEND Bit Function R/W R/W HSYNC End position. 7-0 HSEND 0x6D – ...
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... TW9910 0x6E – OVSEND Bit Function R/W R/W 1:HSYNC output is HACTIVE. 7 HSPIN 6-4 OFDLY R/W FIELD output delay. R/W 1:VSYNC output is HACTIVE-VSYNC mode. 3 VSMODE R/W Line delay for VSYNC end position. 2-0 OVSEND 0x6F – VBIDELAY Bit Function R/W R/W 1:VBI data slicer enable 7 PDNSVBI 6 Reserved R/W R/W Raw VBI output delay ...
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... TW9910 Pin Diagram 44 PIN LQFP VDDE SCLK SDAT PDN RSTB TMODE AVD YMUX3 YMUX2 YGND YMUX1 TECHWELL, INC TW9910 Low Power NTSC/PAL/SECAM Video Decoder with VBI Slicer 33 VD[7] 32 VD[8] 31 VD[9] 30 VD[10] 29 VDD 28 VD[11] 27 VD[12] 26 VD[13] 25 VD[14] 24 VD[15] 23 VDDE A REV. 09/21/2006 ...
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... TW9910 Pin Diagram 48 PIN QFN VDDE SCLK SDAT PDN RSTB TMODE NC AVD YMUX3 YMUX2 YGND YMUX1 TECHWELL, INC TW9910 Low Power NTSC/PAL/SECAM Video Decoder with VBI Slicer VD[7] 36 VD[8] 35 VD[9] 34 VD[10] 33 VDD VD[11] 30 VD[12] 29 VD[13] 28 VD[14] 27 VD[15] 26 VDDE ...
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... TW9910 Pin Description Pin# I/O Pin Name LQFP QFN Analog video signals MUX0 MUX1 MUX2 MUX3 10 11 YGND CIN0 Clock Signals XTI XTO Host Interface SCLK 3 3 I/O SDAT General signals RSTB PDN ...
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... TW9910 Power and Ground Pins Pin# I/O Pin Name VDD 17,39 19,42 I VSS 1,23 1,25 I VDDE 22,42 24,46 I VSSE 7,15 8,16 I AVD 13,16 14,17 I AVS TECHWELL, INC. Description 1.8V digital core power. 1.8V digital core return 3.3V digital I/O power. 3.3V digital I/O return 1.8V analog ADC supply 1.8V analog ADC return 61 Low Power NTSC/PAL/SECAM Video Decoder with VBI Slicer A REV ...
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... TW9910 Parametric Information AC/DC Electrical Parameters Table 21. Absolute Maximum Ratings Parameter AVD (measured to AVS) V (measured to VSS (measured to VSSE) DDE Voltage on any signal pin (See the note below) Analog Input Voltage Storage Temperature Junction Temperature Vapor Phase Soldering(15 Seconds) Stresses above those listed may cause permanent damage to the device. This is a stress rating ...
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... TW9910 Input High Current ( Input Low Current (V =VSS) IN Input Capacitance (f=1 MHz, V Parameter Digital Outputs Output High Voltage (I = –2 mA) OH Output Low Voltage ( mA) OL 3-State Current Output Capacitance Analog Input Analog Pin Input voltage Analog Pin Input Capacitance ADCs ...
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... TW9910 Parameter Output CLK CLKX1 CLKX2 CLKX1 Duty Cycle CLKX2 Duty Cycle CLKX2 to CLKX1 Delay CLKX1 to Data Delay CLKX2 to Data Delay CLKX1 (Falling Edge) to VCLK (Rising Edge) CLKX2 (Falling Edge) to VCLK (Rising Edge) Output Video Data 8-bit Mode (1) Data to VCLK (Rising Edge) Delay ...
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... TW9910 Mechanical Data 44 Pin LQFP θ Gage Plane 0.25mm L S θ3 TECHWELL, INC. TW9910 b θ1 θ 65 Low Power NTSC/PAL/SECAM Video Decoder with VBI Slicer Top View REV. 09/21/2006 ...
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... TW9910 SYMBOL θ θ1 θ2 θ NOTES: 1. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25mm per side. D1 and E1 are maximum plastic body size dimensions including mold mismatch. 2. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall not cause the lead width to exceed the maximum b dimension by more than 0 ...
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... TW9910 48 PIN QFN TECHWELL, INC. Low Power NTSC/PAL/SECAM Video Decoder with VBI Slicer 67 A REV. 09/21/2006 ...
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... TW9910 SYMBOL θ1 R aaa bbb ccc * CONTROLLING DIMENSION : MM NOTES: 1. All dimensions are in millimeters. 2. Dimension applies to plated terminal and is measured between 0.20 and 0.25mm from terminal tip. 3. Package warpage MAX 0.08mm. 4. Package corners unless otherwise specified are R0.175± 0.025mm TECHWELL, INC ...
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... MUX1 0.1uF CIN0 0.1uF TW9910 RST# L1, 3.3uH XTI 27M XTO Note: All unused digital input pins should be tied to DGND. * For 3rd overtone crystal Typical TW9910 External Circuitry 69 Low Power NTSC/PAL/SECAM Video Decoder with VBI Slicer 3.3/5V 4.7k SCL 4.7k SDA VD1-15 3.3V ** option 10k ...
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... TW9910 PCB Layout Considerations The PCB layout should be done to minimize the power and ground noise on the TW9910. This is done by good power de-coupling with minimum lead length on the de-coupling capacitors; well- filtered and regulated analog power input shielding and ground plane isolation. ...
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... TW9910 Copyright Notice This manual is copyrighted by Techwell, Inc. Do not reproduce, transform to any other format, or send/transmit any part of this documentation without the express written permission of Techwell, Inc. Disclaimer This document provides technical information for the user. Techwell, Inc. reserves the right to modify the information in this document as necessary. The customer should make sure that they have the most recent data sheet version ...