lmh6502mtx National Semiconductor Corporation, lmh6502mtx Datasheet - Page 15

• Manufacturer Part Number: lmh6502mtx
• Description: Wideband, Low Power, Linear-in-db Variable Gain Amplifier
• Manufacturer: National Semiconductor Corporation

Application Information
V
square wave riding a DC value. Adjust R
square wave term to zero. After adjusting the input-referred
offset, adjust R
Finally, for inverting applications V
and the offset adjustment to pin 3. These steps will minimize
the output offset voltage. However, since the offset term itself
varies with the gain setting, the correction is not perfect and
some residual output offset will remain at in-between V
Also, this offset trim does not improve output offset tempera-
ture coefficient.
GAIN ACCURACY
Defined as the actual gain compared against the theoretical
gain at a certain V
Theoretical gain is given by:
Where K = 1.72 (nominal) & V
ture.
For a V
the worst case accuracy over the entire range. The "Typical"
value would be the worst case difference between the "Typi-
cal Gain" and the "Theoretical gain". The "Max" value would
be the worst case difference between the max/min gain limit
and the "Theoretical gain".
GAIN MATCHING
Defined as the limit on gain variation at a certain V
pressed in dB). Specified as "Max" only (no "Typical"). For a
V
matching over the entire range. The "Max" value would be
the worst case difference between the max/min gain limit
and the typical gain.
IN
G
range, the value specified represents the worst case
= 0V, the input referred V
FIGURE 2. Nulling the output offset voltage
G
range, the value specified in the tables represents
14
(with V
G
(results expressed in dB).
IN
= 0, V
OS
C
term shows up as a small
= 90mV
IN
G
= 0) until V
may be applied to pin 6
10
(Continued)
@
to null the V
room tempera-
OUT
is zero.
G
20067743
(ex-
G
(4)
OS
’s.
15
NOISE
Figure 3 describes the LMH6502’s output-referred spot
noise density as a function of frequency with A
The plot includes all the noise contributing terms. However,
with both inputs terminated in 50Ω, the input noise contribu-
tion is minimal. At A
input-referred spot noise density (e
band. For applications extending well into the flat-band re-
gion, the input RMS voltage noise can be determined from
the following single-pole model:
CIRCUIT LAYOUT CONSIDERATIONS & EVALUATION
BOARD
A good high frequency PCB layout including ground plane
construction and power supply bypassing close to the pack-
age are critical to achieving full performance. The amplifier is
sensitive to stray capacitance to ground at the I
12); keep node trace area small. Shunt capacitance across
the feedback resistor should not be used to compensate for
this effect. For best performance at low maximum gains
(A
a similar fashion. Capacitance to ground should be mini-
mized by removing the ground plane from under the body of
R
10) degrades phase margin leading to frequency response
peaking.
The LMH6502 is fully stable when driving a 100Ω load. With
reduced load (e.g. 1kΩ) there is a possibility of instability at
very high frequencies beyond 400MHz especially with a
capacitive load. When the LMH6502 is connected to a light
load as such, it is recommended to add a snubber network to
the output (e.g. 100Ω and 39pF in series tied between the
LMH6502 output and ground). C
the output by placing a small resistor in series with the output
(pin 10).
Component parasitics also influence high frequency results.
Therefore it is recommended to use metal film resistors such
as RN55D or leadless components such as surface mount
devices. High profile sockets are not recommended.
G.
VMAX
. Parasitic or load capacitance directly on the output (pin
FIGURE 3. Output Referred Voltage Noise vs.
<
10) +R
G
and -R
VMAX
Frequency
= 10V/V, the LMH6502 has a typical
G
connections should be treated in
L
can also be isolated from
in
) of 7.7nV/
VMAX
www.national.com
−
20067710
input (pin
= 10V/V.
flat-
(5)