74vcx32373 Fairchild Semiconductor, 74vcx32373 Datasheet
74vcx32373
Related parts for 74vcx32373
74vcx32373 Summary of contents
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... HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the out- puts are in a high impedance state. The 74VCX32373 is designed for low voltage (1.65V to 3.6V) V applications with I/O compatibility up to 3.6V. CC ...
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Connection Diagram Pin Assignment for FBGA (Top Thru View) Truth Tables Inputs – Inputs – ...
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... Functional Description The 74VCX32373 contains thirty-two edge D-type latches with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. Control pins can be shorted together to obtain full 32-bit operation. The following description applies to each byte. When the Latch Enable (LE ...
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Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( Outputs 3-STATED Outputs Active (Note 4) 0. Input Diode Current ( Output ...
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DC Electrical Characteristics (2.3V Symbol Parameter V HIGH Level Input Voltage IH V LOW Level Input Voltage IL V HIGH Level Output Voltage OH V LOW Level Output Voltage OL I Input Leakage Current I I 3-STATE Output Leakage OZ ...
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AC Electrical Characteristics Symbol Parameter Propagation Delay PHL PLH Propagation Delay PHL PLH Output Enable Time PZL PZH Output ...
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AC Loading and Waveforms TEST PLH PHL PZL PLZ PZH PHZ FIGURE 2. Waveform for Inverting and Non-Inverting Functions FIGURE 4. 3-STATE Output LOW Enable and Disable Times for Low Voltage ...
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Physical Dimensions inches (millimeters) unless otherwise noted 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...