tja1021 NXP Semiconductors, tja1021 Datasheet - Page 4

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tja1021

Manufacturer Part Number
tja1021
Description
Tja1021 Lin 2.0/sae J2602 Transceiver
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
6. Pinning information
7. Functional description
TJA1021_3
Product data sheet
6.1 Pinning
6.2 Pin description
7.1 Operating modes
Table 3.
The TJA1021 is the interface between the LIN master/slave protocol controller and the
physical bus in a Local Interconnect Network (LIN). The TJA1021 is LIN 2.0/SAE J2602
compliant and provides optimum ElectroMagnetic Compatibility (EMC) performance due
to wave shaping of the LIN output.
The /20 version of the TJA1021 is optimized for the maximum specified LIN transmission
speed of 20 kBd; the /10 version of the TJA1021 is optimized for the LIN transmission
speed of 10.4 kBd as specified by the SAE J2602.
The TJA1021 provides a mode of normal operation, an intermediate mode, a power-up
mode and a very-low-power mode.
Symbol
RXD
SLP_N
WAKE_N
TXD
GND
LIN
V
INH
Fig 2. Pin configuration TJA1021T
BAT
Pin description
Pin
1
2
3
4
5
6
7
8
Rev. 03 — 8 October 2007
Description
receive data output (open-drain); active LOW after a wake-up
event
sleep control input (active LOW); controls inhibit output; resets
wake-up source flag on TXD and wake-up request on RXD
local wake-up input (active LOW); negative edge triggered
transmit data input; active LOW output after a local wake-up event
ground
LIN bus line input/output
battery supply
battery related inhibit output for controlling an external voltage
regulator; active HIGH after a wake-up event
WAKE_N
SLP_N
RXD
TXD
Figure 3
1
2
3
4
TJA1021T
shows the state diagram.
001aae067
8
7
6
5
INH
V
LIN
GND
LIN 2.0/SAE J2602 transceiver
BAT
© NXP B.V. 2007. All rights reserved.
TJA1021
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