sab9077h NXP Semiconductors, sab9077h Datasheet

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sab9077h

Manufacturer Part Number
sab9077h
Description
Picture-in-picture Pip Controller
Manufacturer
NXP Semiconductors
Datasheet

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Preliminary specification
File under Integrated Circuits, IC02
DATA SHEET
SAB9077H
Picture-In-Picture (PIP) controller
INTEGRATED CIRCUITS
1996 Aug 07

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sab9077h Summary of contents

Page 1

... DATA SHEET SAB9077H Picture-In-Picture (PIP) controller Preliminary specification File under Integrated Circuits, IC02 INTEGRATED CIRCUITS 1996 Aug 07 ...

Page 2

... IRE Several type of decoder input signals can be set. 1996 Aug 07 GENERAL DESCRIPTION The SAB9077H is a picture-in-picture controller for multi-standard TV-sets. The circuit contains ADCs, reduction circuitry, memory control, display control and DACs. It inserts one or two live video signals with original or reduced sizes into a live video signal ...

Page 3

... Aug 07 CONDITIONS note 1 jitter during 1 line (64 s) input frequency for both the acquisition and display PLLs. Sync PACKAGE DESCRIPTION plastic quad flat package; 100 leads (lead length 1.95 mm); body Preliminary specification SAB9077H MIN. TYP. MAX. UNIT 4.5 5.0 5.5 V 200 mA 27 MHz 4 ...

Page 4

... Philips Semiconductors Picture-In-Picture (PIP) controller BLOCK DIAGRAM ndbook, full pagewidth 1996 Aug 07 4 Preliminary specification SAB9077H ...

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... OPF20 data bus output to memory; bit 6 OPF20 data bus output to memory; bit 2 OPF20 data bus output to memory; bit 5 OPF20 data bus output to memory; bit 3 OPF20 data bus output to memory; bit 4 OPF20 memory shift clock output 5 Preliminary specification SAB9077H DESCRIPTION ...

Page 6

... ADCs and PLLs E009 digital ground for sub-channel ADCs and PLLs HPP01 horizontal synchronization input for sub-channel E027 analog bias reference for sub-channel E009 analog ground for sub-channel PLL 6 Preliminary specification SAB9077H DESCRIPTION C-bus 2 C-bus output data ...

Page 7

... PLL E030 analog positive power supply for main channel PLL E009 analog ground for main channel PLL DESCRIPTION SS DD and and Preliminary specification SAB9077H DESCRIPTION , diode to V and diode to V and ...

Page 8

... TM1 TM2 22 DAI0 23 DAI7 24 DAI1 25 DAI6 26 DAI2 27 DAI5 28 DAI3 29 DAI4 30 1996 Aug 07 SAB9077H Fig.2 Pin configuration. 8 Preliminary specification SAB9077H SPV bias 80 SPH sync 79 SAV SSD 78 SAV DDD 77 SAV bias SAV refT SAV refB SAV DDA 70 SAV SSA ...

Page 9

... The display fine positioning determines the location of the PIPs with respect to the background. sub and main-channel both have their independent PIP size and location control, which is shown in Fig.3. H/2 H/3 H/4 336 224 168 9 Preliminary specification SAB9077H DPH DPH before the DAC stage. sync V/1 V/2 V/3 228 114 76 276 ...

Page 10

... For the twin PIP mode the main channel is not placed in the VDRAM but in an internal buffer, 8 bit resolution is then possible for both PIPs. 10 Preliminary specification SAB9077H SAVFP SUB CHANNEL 238 lines (NTCS) or 286 lines (PAL) ...

Page 11

... SAB9077H MAIN CHANNEL HFP VFP 57H 46H 57H 05H 72H 10H 72H 10H 44H 20H 03H 77H 51H 3BH 03H 77H 03H 05H X X ...

Page 12

... Philips Semiconductors Picture-In-Picture (PIP) controller handbook, halfpage SP-Small handbook, halfpage SP-Large handbook, halfpage Twin-PIP 1996 Aug 07 handbook, halfpage MGD594 SP-Medium handbook, halfpage MGD596 handbook, halfpage MGD598 Fig.4 PIP Modes. 12 Preliminary specification SAB9077H MGD595 MGD597 DP MGD588 POP-Left ...

Page 13

... Philips Semiconductors Picture-In-Picture (PIP) controller handbook, halfpage POP-Right handbook, halfpage MP7 handbook, halfpage MP13 1996 Aug 07 handbook, halfpage MGD589 POP-Double handbook, halfpage MGD591 handbook, halfpage MGD593 Fig.5 PIP Modes. 13 Preliminary specification SAB9077H MGD590 MGD592 MP8 MGD584 Quatro ...

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... Philips Semiconductors Picture-In-Picture (PIP) controller handbook, halfpage MP9 handbook, halfpage Full Field Still Full Field Live 1996 Aug 07 handbook, halfpage MGD585 MGD587 Fig.6 PIP Modes. 14 Preliminary specification SAB9077H MGD586 MP16 ...

Page 15

... Data transfer may be initiated only when the bus is not busy. 2 The SAB9077H has the I C-bus addresses 2C and 2E, switchable by the pin A0. Valid subaddresses are 00H to 18H (Table 4) and 20H to 32H (Table 6). ...

Page 16

... Picture-In-Picture (PIP) controller SA 00H PIP REGISTER MPIPON and SPIPON bits switch respectively the main and sub PIPs of the SAB9077H on or off. The MFREEZE and SFREEZE bits make the current live pictures for the Main and Sub frozen. The writing to the VDRAM is stopped. ...

Page 17

... The MBSBRT and MBSCOL bits control the brightness and colour of the main-border selection colour. SA 14H BACKGROUND CONTROL REGISTER If BGON is set to logic 1 then the background is visible. The BGBRT and BGCOL bits control the brightness and colour of the background colour. 17 Preliminary specification SAB9077H (see Table 5) (see Table 5) ...

Page 18

... The PEDESTU and PEDESTV bits give the U and V DAC outputs an offset LSB when the FBL is switched off. This can be used to adjust the White point of the system. (see sync timing). sync 18 Preliminary specification SAB9077H 6H 7H 30% 50% 70% 100% 70% 100% 70% ...

Page 19

... PIPs on top of the sub PIPs. The DPAL bit sets the correct default values for PAL on the display side. The background is enlarged from 238 lines/field to 288 lines/field. 19 Preliminary specification SAB9077H BIT 3 BIT 2 BIT 1 MVRPN0 SVRPN1 MHRPO10 ...

Page 20

... An overview of the timing diagrams is given in Fig.9. 20 Preliminary specification refT is used for decoupling AC bias for the luminance channels and to refB AV – refT refB for the chrominance channels. 2 pin for the bottom level. Default values refB SAB9077H and AV pins. refB pin for the top refT ...

Page 21

... Fig.7 Vertical synchronization timing and field identification. handbook, full pagewidth BGHFP 1996 Aug 07 389 2nd field BGVFP DVFP DHFP VPIC HPIC 1 HRPN columns 2 Fig.8 Relation of display I C-bus register. 21 Preliminary specification SAB9077H 432 1st field VDIS HDIS MGD583 MBE100 ...

Page 22

... CLOCK RAS CAS AD0 to AD8 DAI0 to DAI7 (1) CLOCK = 13.5 MHz. (2) CLOCK = 27 MHz. 1996 Aug 07 refresh cycle ROW COLUMN COLUMN write cycle (main or sub) ROW COLUMN read cycle Fig.9 VDRAM timing. 22 Preliminary specification COLUMN COLUMN COLUMN MGC970 shift clock cycles SAB9077H ...

Page 23

... QUALITY SPECIFICATION In accordance with “SNW-FQ-611 part E” . The numbers of the quality specification can be found in the “Quality Reference Handbook” . The handbook can be ordered using the code 9397 750 00192. 1996 Aug 07 PARAMETER PARAMETER 23 Preliminary specification SAB9077H MIN. MAX. 0.5 +6.5 1.5 25 +150 ...

Page 24

... note 2 0.84 1. note 2 1.06 1. note 2 1.2 1.5 clamping off 0.1 clamping on 100 5 note 3 1728H 6 8 2.0 4 note 4 V note 4 note 5 24 Preliminary specification SAB9077H TYP. MAX. UNIT 5 100 mV 100 2.3 V 0.5 V 1.10 V 1.16 V 1. MHz ...

Page 25

... V and = refT DD 5.0 3. The internal system frequency is 1728 times the H 4. The Y-channel is clamped to the V 5. The UV-channel is clamped to 6. The gain of the SAB9077H is 1 under the condition that the R 1996 Aug 07 CONDITIONS note 6 note 6 note 3 note 3 note 3 are connected to V ...

Page 26

... PLLs. sync 26 Preliminary specification MIN. TYP 4.5 V 4.1 DDD = 4.5 V 4.1 DDD = 4.5 V DDD = 4.5 V DDD = 4.5 V DDD 0.1 0.1 0.2 17 MIN. TYP SAB9077H MAX. UNIT % 0.4 V ...

Page 27

... Picture-In-Picture (PIP) controller TEST AND APPLICATION INFORMATION The application diagram for 1 FH mode in a standard configuration is shown in Fig.10. Two input signals MCVBS and SCVBS of different sources are processed by the SAB9077H and inserted by the YUV/RGB switch. handbook, full pagewidth DECODER SCVBS DECODER ...

Page 28

... SAV refB SAV refT SAV DDA 69 SAV SSA DDD 68 SV SSD SCV DDD 65 SCV SSD 62 POR 61 SDA 60 SCL MBH505 SAB9077H HOUT VOUT V TDA8310A U Y CVBS/Y CVBS/Y sub-channel input ...

Page 29

... 0.40 0.25 20.1 14.1 24.2 0.65 0.25 0.14 19.9 13.9 23.6 REFERENCES JEDEC EIAJ 29 Preliminary specification 18.2 1.0 1.95 0.2 0.15 0.1 17.6 0.6 EUROPEAN PROJECTION SAB9077H SOT317 detail X (1) ( 0.8 1 0.4 0.6 0 ISSUE DATE 95-02-04 97-08-01 ...

Page 30

... Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 30 Preliminary specification SAB9077H ...

Page 31

... I Philips. This specification can be ordered using the code 9398 393 40011. 1996 Aug components conveys a license under the Philips’ system provided the system conforms to the I 31 Preliminary specification SAB9077H 2 C patent to use the 2 C specification defined by ...

Page 32

Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + ...

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