w681360 Winbond Electronics Corp America, w681360 Datasheet - Page 10

• Manufacturer Part Number: w681360
• Description: 3v Single-channel 13-bit Linear Voice-band Codec
• Manufacturer: Winbond Electronics Corp America

The gain of the operational amplifier will be typically be set to 30dB for microphone interface circuits.
However the gain may be used for more than 30dB but this will require a compact layout with minimal
trace lengths and good isolation from noise sources. It is also recommended that the layout be as
symmetrical as possible as imbalances work against the noise canceling advantages of the differential
design.
The 13-bit digital input samples for the D-to-A path are serially shifted in by the PCM interface and
converted to parallel data bits. During every cycle of the frame sync FSR, the parallel data bits are fed
through the 13-bit linear DAC and converted to analog samples. The analog samples are filtered by a
low-pass smoothing filter with a 3.4kHz cut-off frequency, according to the ITU-T G.712 specification.
A sin(x)/x compensation is integrated with the low pass smoothing filter. The output of this filter is
buffered to provide the receive output signal RO-. The output may be also be attenuated when the
device is in the receive path adjust mode. If the device is operated half–channel with the FST pin
clocking and FSR pin held LOW, the receive filter input will be connected to the V
minimizes transients at the RO– pin when full–channel operation is resumed by clocking the FSR pin.
The RO- output can be externally connected to the PAI pin to provide a differential output with high
driving capability at the PAO+ and PAO- pins. By using external resistors various gain settings of this
output amplifier can be achieved. If the transmit power amplifier is not in use, it can be powered down
by connecting PAI to V
V
impedance loads must be placed between PAO+ and PAO–. The PAO+ and PAO– differential drivers
are also capable of driving a 100Ω resistive load or a 100nF piezoelectric transducer in series with a
20Ω resister with a small increase in distortion. These drivers may be used to drive resistive loads of
32Ω when the gain of PAO– is set to 1/4 or less.
AG
7.2. Receive Path
pin. The V
FIGURE 7.3: INPUT OPERATIONAL AMPLIFIER GAIN – DIFFERENTIAL INPUT
AG
pin cannot source or sink as much current as these pins, and therefore low
DD
. The bias voltage and signal reference of the PAO+ & PAO– outputs is the
Gin = Ro/Ri
+
-
AO
AI-
AI+
- 10 -
Ro
VAG
Ro
Publication Release Date: September 2005
Ri
Ri
Vin-
Vin+
AG
voltage. This
W681360
Revision A.2