pal22v10-7 Advanced Micro Devices, pal22v10-7 Datasheet - Page 6

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pal22v10-7

Manufacturer Part Number
pal22v10-7
Description
Pal22v10 Family, Ampal22v10/a 24-pin Ttl Versatile Pal Device
Manufacturer
Advanced Micro Devices
Datasheet

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Register Preload
The register on the PAL22V10 can be preloaded from
the output pins to facilitate functional testing of complex
state machine designs. This feature allows direct load-
ing of arbitrary states, making it unnecessary to cycle
through long test vector sequences to reach a desired
state. In addition, transitions from illegal states can be
verified by loading illegal states and observing proper
recovery.
Security Fuse
After programming and verification, a PAL22V10 design
can be secured by programming the security fuse. Once
programmed, this fuse defeats readback of the internal
programmed pattern by a device programmer, securing
proprietary designs from competitors. When the secu-
rity fuse is programmed, the array will read as if every
fuse is programmed, and preload will be disabled.
Programming
The PAL22V10 can be programmed on standard logic
programmers. Approved programmers are listed at the
end of this data book.
2-202
AMD
PAL22V10 Family
Quality and Testability
The PAL22V10 offers a very high level of built-in quality.
Extra programmable fuses, test words and test columns
provide a means of verifying performance of all AC and
DC parameters. In addition, this verifies complete
programmability and functionality of the device to pro-
vide the highest programming yields and post-program-
ming functional yields in the industry.
Technology
The AmPAL22V10A is fabricated with AMD’s diffusion-
isolated bipolar process. The array connections are
formed with highly reliable PtSi fuse.
The PAL22V10-15, -10 and -7 are fabricated with
AMD’s diffusion-isolated bipolar process. This process
reduces parasitic capacitances and minimum geome-
tries to provide higher performance. The array
connections are formed with PtSi fuses on the -15, and
TiW fuses on the -7 and -10 for reliable operation.

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