mc68hc05p9a Freescale Semiconductor, Inc, mc68hc05p9a Datasheet - Page 81

no-image

mc68hc05p9a

Manufacturer Part Number
mc68hc05p9a
Description
Hcmos Microcontroller Unit
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Clearing the COP
Watchdog
Interrupts
COP Register
7-cop0cop
MOTOROLA
NOTE:
To clear the COP watchdog and prevent a COP reset, write a logic 0 to
bit 0 (COPC) of the COP register at location $1FF0.
If the main program executes within the COP timeout period, the clearing
routine needs to be executed only once. If the main program takes
longer than the COP timeout period, the clearing routine must be
executed more than once.
Place the clearing routine in the main program and not in an interrupt
routine. Clearing the COP watchdog in an interrupt routine might prevent
COP watchdog timeouts even though the main program is not operating
properly.
The COP watchdog does not generate interrupts.
The COP register is a write-only register that returns the contents of
EPROM location $1FF0 when read.
COPC — COP Clear
$1FF0
Reset:
Read:
Write:
COPC is a write-only bit. Periodically writing a logic 0 to COPC
prevents the COP watchdog from resetting the MCU. Reset clears the
COPC bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
Bit 7
D7
U
Go to: www.freescale.com
= Unimplemented
D6
Figure 41. COP Register (COPR)
U
6
COP
D5
U
5
D4
U
4
U = Unaffected
D3
U
3
D2
U
2
D1
U
1
Interrupts
COPC
Bit 0
D0
0
COP
81

Related parts for mc68hc05p9a