mc68hc908gt8 Freescale Semiconductor, Inc, mc68hc908gt8 Datasheet - Page 236

• Manufacturer Part Number: mc68hc908gt8
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Timer Interface Module (TIM)
18.9.5 TIM Channel Registers
These read/write registers contain the captured TIM counter value of the input capture function or the
output compare value of the output compare function. The state of the TIM channel registers after reset
is unknown.
In input capture mode (MSxB:MSxA = 0:0), reading the high byte of the TIM channel x registers (TCHxH)
inhibits input captures until the low byte (TCHxL) is read.
In output compare mode (MSxB:MSxA ≠ 0:0), writing to the high byte of the TIM channel x registers
(TCHxH) inhibits output compares until the low byte (TCHxL) is written.
236
Address: T1CH0H, $0026 and T2CH0H, $0031
Address: T1CH0L, $0027 and T2CH0L $0032
Address: T1CH1H, $0029 and T2CH1H, $0034
Address: T1CH1L, $002A and T2CH1L, $0035
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
CHxMAX
TCHx
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
OVERFLOW
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Figure 18-13. TIM Channel 0 Register High (TCH0H)
Figure 18-15. TIM Channel 1 Register High (TCH1H)
Figure 18-14. TIM Channel 0 Register Low (TCH0L)
Figure 18-16. TIM Channel 1 Register Low (TCH1L)
COMPARE
PERIOD
OUTPUT
14
14
6
6
6
6
6
6
Figure 18-12. CHxMAX Latency
OVERFLOW
13
13
5
5
5
5
5
5
COMPARE
OUTPUT
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
OVERFLOW
12
12
4
4
4
4
4
4
COMPARE
OUTPUT
11
11
3
3
3
3
3
3
OVERFLOW
10
10
2
2
2
2
2
2
COMPARE
OUTPUT
1
9
1
1
1
9
1
1
OVERFLOW
Freescale Semiconductor
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0