mc68hc908qb4 Freescale Semiconductor, Inc, mc68hc908qb4 Datasheet - Page 153

• Manufacturer Part Number: mc68hc908qb4
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

POR — Power-On Reset Bit
PIN — External Reset Bit
COP — Computer Operating Properly Reset Bit
ILOP — Illegal Opcode Reset Bit
ILAD — Illegal Address Reset Bit (illegal attempt to fetch an opcode from an unimplemented
address)
MODRST — Monitor Mode Entry Module Reset Bit
LVI — Low Voltage Inhibit Reset bit
14.8.2 Break Flag Control Register
The break control register (BFCR) contains a bit that enables software to clear status bits while the MCU
is in a break state.
BCFE — Break Clear Flag Enable Bit
Freescale Semiconductor
This read/write bit enables software to clear status bits by accessing status registers while the MCU is
in a break state. To clear status bits during the break state, the BCFE bit must be set.
1 = Last reset caused by POR circuit
0 = Read of SRSR
1 = Last reset caused by external reset pin (RST)
0 = POR or read of SRSR
1 = Last reset caused by COP counter
0 = POR or read of SRSR
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR
1 = Last reset caused by monitor mode entry when vector locations $FFFE and $FFFF are $FF after
0 = POR or read of SRSR
1 = Last reset caused by LVI circuit
0 = POR or read of SRSR
1 = Status bits clearable during break
0 = Status bits not clearable during break
POR while IRQ ≠ V
Reset:
Read:
Write:
BCFE
Bit 7
R
0
Figure 14-20. Break Flag Control Register (BFCR)
= Reserved
TST
R
6
MC68HC908QB8 Data Sheet, Rev. 2
R
5
R
4
3
R
R
2
R
1
Bit 0
R
SIM Registers
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