ade7761a Analog Devices, Inc., ade7761a Datasheet - Page 18

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ade7761a

Manufacturer Part Number
ade7761a
Description
Energy Metering Ic With On-chip Fault And Missing Neutral Detection
Manufacturer
Analog Devices, Inc.
Datasheet

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ADE7761A
Fault with Active Input Greater than Inactive Input
If V
and the voltage signal on V
of V
are filtered and averaged to prevent false triggering of this logic
output. As a consequence of the filtering, there is a time delay of
approximately 3 sec on the logic output FAULT after the fault
event. The FAULT logic output is independent of any activity on
outputs F1 or F2. Figure 28 shows one condition under which
FAULT becomes active. Because V
still greater than V
swap to the V
Fault with Inactive Input Greater than Active Input
Figure 29 illustrates another fault condition. If the difference
between V
is, being used for billing), becomes greater than 6.25% of V
the FAULT indicator becomes active and a swap over to the V
input occurs. The analog input V
Again, a time constant of about 3 sec is associated with this
swap. V
greater than V
this order—becomes greater than 6.25% of V
FAULT indicator becomes inactive as soon as V
6.25% of V
between V
0V
0V
Figure 28. Fault Conditions for Active Input Greater than Inactive Input
Figure 29. Fault Conditions for Inactive Input Greater than Active Input
1A
1A
V
V
<0
FAULT
, the fault indicator becomes active. Both analog inputs
is the active current input (that is, being used for billing),
1B
1A
FAULT + SWAP
1A
<0
6.25% OF ACTIVE INPUT
6.25% OF INACTIVE INPUT
< 93.75% OF V
< 93.75% OF V
V
V
V
V
1A
1A
does not swap back to the active channel until V
1B
1B
1A
1B
1B
, the inactive input, and V
. This threshold eliminates potential chatter
and V
1B
1B
AGND
AGND
input occurs. V
and the difference between V
1B
1B
1A
1B
, billing is maintained on V
.
V
V
>0
V
V
1B
1A
1B
1A
1B
>0
V
V
V
V
V
V
(inactive input) falls below 93.75%
1A
1N
1B
1A
1N
1B
ACTIVE POINT – INACTIVE INPUT
1A
ACTIVE POINT – INACTIVE INPUT
1B
remains the active input.
1A
becomes the active input.
is the active input and it is
1A
A
B
, the active input (that
A
B
COMPARE
COMPARE
FILTER
FILTER
1A
AND
AND
1A
. However, the
1A
1A
and V
, that is, no
is within
FAULT
TO
MULTIPLIER
FAULT
TO
MULTIPLIER
1B
—in
1A
1B
Rev. 0 | Page 18 of 24
,
is
1B
Calibration Concerns
Typically, when a meter is being calibrated, the voltage and
current circuits are separated, as shown in Figure 30. This
means that current passes through only the phase or neutral
circuit. Figure 30 shows current being passed through the phase
circuit. This is the preferred option because the ADE7761A
starts billing on the input V
CT is connected to V
in the neutral circuit, the FAULT indicator comes on under
these conditions. However, this does not affect the accuracy of
the calibration and can be used as a means to test the functionality
of the fault detection.
If the neutral circuit is chosen for the current circuit in the
arrangement shown in Figure 30, this may have implications for
the calibration accuracy. The ADE7761A powers up with the
V
current in the phase circuit, the signal on V
causes a fault to be flagged and the active input to be swapped
to V
the phase and neutral CTs may differ slightly. Because under
no-fault conditions all billing is carried out using the phase CT,
the meter should be calibrated using the phase circuit. Of
course, both phase and neutral circuits can be calibrated.
MISSING NEUTRAL MODE
The ADE7761A integrates a novel fault detection that warns
and allows the ADE7761A to continue to bill in case a meter is
connected to only one wire (see Figure 31). For correct
operation of the ADE7761A in this mode, the V
ADE7761A must be maintained within the specified range (5 V
± 5%). The missing neutral detection algorithm is designed to
work over a line frequency of 45 Hz to 55 Hz.
1
CURRENT
RB + VR = RF.
1A
TEST
input active as normal. However, because there is no
1B
(neutral). The meter can be calibrated in this mode, but
IB
IB
Figure 30. Conditions for Calibration of Channel B
240V rms
V
AGND
RA
1A
1
RB
VR
in Figure 30. Because there is no current
1
1
CT
CT
1A
on power-up. The phase circuit
RB
RB
C
F
R
0V
V
F
1A
C
R
R
T
F
F
V
V
1A
2P
2N
is zero. This
C
C
F
F
DD
V
V
V
1A
1N
1B
pin of the

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