mm908e626 Freescale Semiconductor, Inc, mm908e626 Datasheet - Page 18

• Manufacturer Part Number: mm908e626
• Description: Integrated Stepper Motor Driver With Embedded Mcu And Lin Serial Communication
• Manufacturer: Freescale Semiconductor, Inc

OCF — OVERCURRENT FLAG BIT
Reset clears the OCF bit. To clear this flag, write a logic [1] to
the appropriate overcurrent flag in the SYSSTAT Register.
See
OCF.
INTERRUPT MASK REGISTER (IMR)
LINIE — LIN LINE INTERRUPT ENABLE BIT
LINF. Reset clears the LINIE bit.
18
908E626
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Reset
Read
Write
This read-only flag is set on an overcurrent condition.
• 1 = High-current condition has occurred.
• 0 = High-current condition has not occurred.
This read / write bit enables CPU interrupts by the LIN flag,
• 1 = Interrupt requests from LINF flag enabled.
• 0 = Interrupt requests from LINF flag disabled.
Figure
Figure 8. Principal Implementation for OCF
Bit 7
0
0
8, which shows the two signals triggering the
Register Name and Address: IMR - $04
RST_A
HVDD_OCF
HB_OCF
6
0
0
LINIE
5
0
HTIE
4
0
VDD
LVIE
3
0
HVIE
OCF
2
0
Figure 9. Internal Reset Routing
OCIE
1
0
Bit 0
Low-Voltage Reset
0
0
HTIE — HIGH-TEMPERATURE INTERRUPT
ENABLE BIT
temperature flag, HTF. Reset clears the HTIE bit.
LVIE — LOW-VOLTAGE INTERRUPT ENABLE BIT
voltage flag, LVF. Reset clears the LVIE bit.
HVIE — HIGH-VOLTAGE INTERRUPT ENABLE BIT
voltage flag, HVF. Reset clears the HVIE bit.
OCIE — Overcurrent Interrupt Enable Bit
overcurrent flag, OCF. Reset clears the OCIE bit.
RESET
external reset source, as explained in the paragraphs below.
Figure 9
SPI REGISTERS
AWDRE Flag
HVRE Flag
HTRE Flag
This read / write bit enables CPU interrupts by the high-
• 1 = Interrupt requests from HTF flag enabled.
• 0 = Interrupt requests from HTF flag disabled.
This read / write bit enables CPU interrupts by the low-
• 1 = Interrupt requests from LVF flag enabled.
• 0 = Interrupt requests from LVF flag disabled.
This read / write bit enables CPU interrupts by the high-
• 1 = Interrupt requests from HVF flag enabled.
• 0 = Interrupt requests from HVF flag disabled.
This read / write bit enables CPU interrupts by the
• 1 = Interrupt requests from OCF flag enabled.
• 0 = Interrupt requests from OCF flag disabled.
The 908E626 chip has four internal reset sources and one
depicts the internal reset sources.
High-Temperature
Reset Sensor
High-Voltage
AWD Reset
Reset Sensor
Sensor
MONO
FLOP
Analog Integrated Circuit Device Data
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