ep20k1000e Altera Corporation, ep20k1000e Datasheet - Page 68

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ep20k1000e

Manufacturer Part Number
ep20k1000e
Description
Programmable Logic Device Family
Manufacturer
Altera Corporation
Datasheet

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APEX 20K Programmable Logic Device Family Data Sheet
68
All specifications are always representative of worst-case supply voltage
and junction temperature conditions. All output-pin-timing specifications
are reported for maximum driver strength.
Figure 36
Figure 36. APEX 20K f
Figure 37
parameters can be used to estimate f
Quartus II software timing analysis should be used for more accurate
timing information.
shows the f
shows the f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
ESBRC
ESBWC
ESBDATASU
ESBADDRSU
ESBDD
PD
PTERMCO
ESBWESU
ESBDATACO1
ESBDATACO2
PTERMSU
SU
H
CO
LUT
LE
MAX
ESB
MAX
MAX
Timing Model
timing model for APEX 20K devices.
timing model for APEX 20KE devices. These
MAX
for multiple levels of logic.
Routing Delay
t
t
t
F20+
F1—4
F5—20
Altera Corporation

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