adsp2185 Analog Devices, Inc., adsp2185 Datasheet - Page 18

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adsp2185

Manufacturer Part Number
adsp2185
Description
Dsp Microcomputer
Manufacturer
Analog Devices, Inc.
Datasheet

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ADSP-2185
Parameter
Interrupts and Flag
Timing Requirements:
t
t
Switching Characteristics:
t
t
NOTES
1
2
3
4
5
IFS
IFH
FOH
FOD
If IRQx and FI inputs meet t
the following cycle. (Refer to “Interrupt Controller Operation” in the Program Control chapter of the ADSP-2100 Family User’s Manual for further information on
interrupt servicing.)
Edge-sensitive interrupts require pulse widths greater than 10 ns; level-sensitive interrupts must be held low until serviced.
IRQx = IRQ0, IRQ1, IRQ2, IRQL0, IRQL1, IRQE.
PFx = PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7.
Flag outputs = PFx, FL0, FL1, FL2, Flag_out
IRQx, FI, or PFx Setup before CLKOUT Low
IRQx, FI, or PFx Hold after CLKOUT High
Flag Output Hold after CLKOUT Low
Flag Output Delay from CLKOUT Low
IFS
and t
IFH
setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on
OUTPUTS
CLKOUT
4
.
FLAG
IRQx
PFx
FI
Figure 15. Interrupts and Flags
5
5
t
FOH
t
FOD
1, 2, 3, 4
–18–
1, 2, 3, 4
t
IFH
t
IFS
Min
0.25 t
0.25 t
0.5 t
CK
CK
CK
– 7
+ 15
Max
0.25 t
CK
+ 5
Unit
ns
ns
ns
ns
REV. 0

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