atf280e ATMEL Corporation, atf280e Datasheet - Page 10

• Manufacturer Part Number: atf280e
• Description: Rad Hard Reprogrammable Fpga
• Manufacturer: ATMEL Corporation

3. Pin Description
Clock
I/O
FPGA Configuration
10
ATF280E
GCK1:GCK8 - Global Clock (Input)
FCK1:FCK4 - Fast Clock (Input)
I/Oy_x - Programmable I/O (Input/Output)
The programmable I/Os are dedicated to user’s application. Each programmable I/O can inde-
pendently be configured as input, output or bidirectional I/O. Each I/O is part of an I/O cluster.
This leads to the following naming: I/Oy_x where ‘y’ is the cluster number (1 < y < 8) and ‘x’ is
the I/O number in the cluster.
OLVDSx - LVDS Driver (Output)
OLVDSx where ‘x’ is the LVDS channel number (1 < x < 8).
OLVDSxN - Complimentary LVDS Driver (Output)
OLVDSxN where ‘x’ is the LVDS channel number (1 < x < 8).
ILVDSx - LVDS Receiver (Input)
ILVDSx where ‘x’ is the LVDS channel number (1 < x < 8).
ILVDSxN - Complimentary LVDS Receiver(Input)
ILVDSxN where ‘x’ is the LVDS channel number (1 < x < 8).
M0, M1, M2 (Input)
The mode pins are dedicated TTL threshold inputs that determine the configuration mode to be
used. Table 1 lists the states for each configuration mode. The mode pins should not be
changed during power-on-reset, manual reset, or configuration download. The user may change
the mode pins during configuration idle. These pins have no pull-up resistors to VCC, so they
need to be driven by the user or tied off.
CCLK (Input/Output)
CCLK is the configuration clock pin. It is an input or output depending on the mode of operation.
During power-on-reset or manual reset, it is a tri-stated output. During configuration download
and in Mode 0, it is an output with a typical frequency of 1 MHz. During configuration download
and in all other modes, it is a Schmitt trigger input with approximately 1V of hysteresis for noise
immunity. It is an input during configuration idle, but is ignored. It is pulled to VCC with a nominal
50K internal resistor.
RESETn - Reset (Input)
RESETn is the FPGA configuration manual reset pin. It is available during all configuration
states. It initiates a configuration clear cycle and, if operating in Mode 0, an auto configuration. It
is a dedicated Schmitt trigger input with approximately 1V of hysteresis for noise immunity. It is
pulled to VCC with a nominal 50K internal resistor.
INIT - (Input/Output)
7750A–AERO–07/07