atf22v10c-15xi ATMEL Corporation, atf22v10c-15xi Datasheet - Page 7

• Manufacturer Part Number: atf22v10c-15xi
• Description: Atf22v10c High- Performance Ee Pld
• Manufacturer: ATMEL Corporation

4.7
4.8
5. Electronic Signature Word
6. Security Fuse Usage
0735R–PLD–06/06
Power-up Reset
Preload of Registered Outputs
The registers in the ATF22V10Cs are designed to reset during power-up. At a point delayed
slightly from V
depend on the polarity of the output buffer.
This feature is critical for state machine initialization. However, due to the asynchronous nature
of reset and the uncertainty of how V
required:
Figure 4-1.
The ATF22V10C’s registers are provided with circuitry to allow loading of each register with
either a high or a low. This feature will simplify testing since any state can be forced into the reg-
isters to control test sequencing. A JEDEC file with preload is generated when a source file with
vectors is compiled. Once downloaded, the JEDEC file preload sequence will be done automati-
cally by most of the approved programmers after the programming.
There are 64 bits of programmable memory that are always available to the user, even if the
device is secured. These bits can be used for user-specific data.
A single fuse is provided to prevent unauthorized copying of the ATF22V10C fuse patterns.
Once programmed, fuse verify and preload are inhibited. However, the 64-bit User Signature
remains accessible.
The security fuse should be programmed last, as its effect is immediate.
1. The V
2. After reset occurs, all input and feedback setup times must be met before driving the
3. The clock must remain stable during t
clock pin high, and
CC
CC
rise must be monotonic, and starts below 0.7V,
Power-up Reset Timing
crossing V
POWER
REGISTERED
OUTPUTS
C LOCK
RST
, all registers will be reset to the low state. The output state will
V
R
ST
CC
actually rises in the system, the following conditions are
PR
.
t
PR
t
W
t
S
ATF22V10C(Q)
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