cat5172 ON Semiconductor, cat5172 Datasheet - Page 4

• Manufacturer Part Number: cat5172
• Description: 256-position Spi Compatible Digital Potentiometer
• Manufacturer: ON Semiconductor

10. Typical specifications represent average readings at +25°C and V
11. Guaranteed by design and not subject to production test.
12. See timing diagram for location of measured values. All input control voltages are specified with t
DYNAMIC CHARACTERISTICS (Notes 7 and 9)
SPI INTERFACE TIMING CHARACTERISTICS (Notes 11 and 12) (Specifications Apply to All Parts)
Table 4. ELECTRICAL CHARACTERISTICS: 50 kW and 100 kW Versions
V
Bandwidth –3 dB
Total Harmonic Distortion
V
2. Typical specifications represent average readings at +25°C and V
3. Resistor position nonlinearity error R−INL is the deviation from an ideal value measured between the maximum resistance and the minim-
4. V
5. INL and DNL are measured at VW with the DPP configured as a potentiometer divider similar to a voltage output D/A converter. V
6. Resistor terminals A, B, W have no limitations on polarity with respect to each other.
7. Guaranteed by design and not subject to production test.
8. PDISS is calculated from (I
9. All dynamic characteristics use V
Table 5. TIMING CHARACTERISTICS: 50 kW and 100 kW Versions
V
Clock Frequency
Input Clock Pulse width
Data Setup Time
Data Hold Time
CS Setup Time
CS High Pulse Width
CLK Fall to CS Fall Hold Time
CLK Fall to CS Rise Hold Time
CS Rise to Clock Rise Setup
DD
W
DD
from a voltage level of 1.5 V.
um resistance wiper positions. R−DNL measures the relative step change from ideal between successive tap positions. Parts are guaran-
teed monotonic.
and V
Settling Time (50 kW/100 kW)
= 5 V ±10%, or 3 V ±10%; V
AB
= 5 V ± 10%, or 3 V ± 10%; V
= V
B
= 0 V. DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
DD
Parameter
, Wiper (V
Parameter
W
) = no connect.
DD
A
x V
A
= V
= V
DD
DD
DD
DD
). CMOS logic level inputs result in minimum power dissipation.
= 5 V.
; V
; V
V
B
R
A
B
= 0 V; –40°C < T
AB
= 5 V, V
= 0 V; –40°C < T
= 50 kW / 100 kW, Code = 0x80
Clock level high or low
f = 1 kHz, R
V
A
Test Conditions
=1 V rms, V
Test Conditions
B
= 0 V, ±1 LSB error band
http://onsemi.com
AB
A
A
< +85°C; unless otherwise noted.
= 10 kW
B
< +85°C; unless otherwise noted.
= 0 V,
4
DD
DD
= 5 V.
= 5 V.
Symbol
THD
(continued)
BW
t
S
Symbol
t
CH
T
T
W
T
T
T
f
CSH0
CSH1
t
t
CLK
CSW
DH
CSS
CS1
DS
, t
CL
R
= t
Min
F
Min
20
15
40
10
= 2 ns (10% to 90% of 3 V) and timed
5
5
0
0
(Note 2)
100/40
(Note 10)
0.05
Typ
2
Typ
Max
Max
25
A
= V
MHz
Unit
kHz
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
%
DD