pca9527 NXP Semiconductors, pca9527 Datasheet

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pca9527

Manufacturer Part Number
pca9527
Description
3-channel Bidirectional Bus Extender For Hdmi, I C-bus And Smbus
Manufacturer
NXP Semiconductors
Datasheet

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1. General description
The PCA9527 is a 3-channel bidirectional open-drain bus buffer for Display Data Control
(DDC) clock, data and Consumer Electronic Control (CEC) for HDMI application. The
device has two power supply pins to allow voltage level shift from 2.7 V to 5 V, and a
rise time accelerator on port A of each DDC clock and data for driving longer cable (up to
18 meters or 1400 pF reliably without violating the bus rise time). The 5 V tolerant CEC
channel is internally connected to V
channel can be used as an interrupt or reset.
While retaining all the operating modes and features of the I
level shift, it also permits extension of the I
data (SDA), clock (SCL), and CEC. Using the PCA9527 enables the system designer to
isolate bus capacitance to meet HDMI DDC version 1.3 distance specification. The SDAx
and SCLx pins are overvoltage tolerant and are high-impedance when the PCA9527 is
unpowered. The port B drivers (SDAB, SCLB, CECB) with static level offset behave much
like the drivers on the PCA9515 device, while the SDAA and SCLA drivers integrate the
rise time accelerator, sink more current and eliminate the static offset voltage. The CECA
driver has the same current and static offset voltage features as the SDAA and SCLA, but
it does not have the rise time accelerator and is powered and referenced to V
results in a LOW on the port B translating into a nearly 0 V LOW on port A, providing zero
offset. The static level offset design of the port B I/O drivers prevent them from being
connected to another device that has rise time accelerator including the PCA9507
(port B), PCA9510, PCA9511, PCA9512, PCA9513, PCA9514, PCA9515, PCA9516A,
PCA9517 (port B), or PCA9518A. Port A of two or more PCA9527s can be connected
together, however, to allow a star topography with port A on the common bus, and port A
can be connected directly to any other buffer with static or dynamic offset voltage. Multiple
PCA9527s can be connected in series, port A to port B, with no build-up in offset voltage
with only time of flight delays to consider. Rise time accelerators on the SDAA and SCLA
pins are turned on when input threshold is above 0.3V
drivers are not enabled unless V
used to turn the drivers on and off under system control. Caution should be observed to
only change the state of the enable pin when the bus is idle. The output pull-down on the
port B internal buffer LOW is set for approximately 0.5 V, while the input threshold of the
internal buffer is set about 70 mV lower (0.43 V). When the port B I/O is driven LOW
internally, the LOW is not recognized as a LOW by the input. This prevents a lock-up
condition from occurring.
PCA9527
3-channel bidirectional bus extender for HDMI, I
SMBus
Rev. 01 — 29 June 2009
CC(A)
CC(B)
and V
and has no rise time accelerator. The CEC
2
C-bus by providing bidirectional buffering for
CC(B)
are above 2.7 V. The EN pin can also be
CC(A)
. The PCA9527 SDA and SCL
2
C-bus system during the
Product data sheet
2
C-bus and
CC(B)
. This

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pca9527 Summary of contents

Page 1

... A on the common bus, and port A can be connected directly to any other buffer with static or dynamic offset voltage. Multiple PCA9527s can be connected in series, port A to port B, with no build-up in offset voltage with only time of flight delays to consider. Rise time accelerators on the SDAA and SCLA pins are turned on when input threshold is above 0 ...

Page 2

... Ordering information Topside Package mark Name Description [1] 9527 TSSOP10 plastic thin shrink small outline package; 10 leads; body width 3 mm Rev. 01 — 29 June 2009 PCA9527 2 C-bus and SMBus 2 C-bus devices and multiple masters Version SOT552-1 © NXP B.V. 2009. All rights reserved ...

Page 3

... CECA PCA9527_1 Product data sheet 3-channel bidirectional bus extender for HDMI CC(A) V CC(A) DYNAMIC PULL-UP SCLA V CC(A) DYNAMIC PULL-UP SDAA CECA PCA9527 Functional diagram of PCA9527 V 1 CC(A) 2 SCLA SDAA 3 PCA9527DP CECA 4 GND 5 Pin configuration for TSSOP10 Pin description Pin Description 1 port A supply voltage (2 5.5 V) ...

Page 4

... A is controlling the part unless port B falls below 0.4 V. When the port B voltage is 0.4 V the port A driver of the PCA9527 is on and holds port A down to nearly the port B voltage rises because the external driver turns off, the port B voltage rises up to ~0.5 V because port A is LOW ...

Page 5

... Rise time accelerators PCA9527 has rise time accelerators on port A of SCL and SDA only; the CECA pin does not have a rise time accelerator. During port A positive bus transitions a current source is switched on to quickly slew the SDAA and SCLA lines HIGH once the input level of 0 ...

Page 6

... TV) 10.5 8.5 6.5 does not comply with 4.5 complies with 1 s rise time 2.5 0.5 0 1.0 rise time = CC(A) SDAA/SCLA line pull-up resistor versus load capacitance Rev. 01 — 29 June 2009 PCA9527 2 Minimum 1 1 rise time 2.0 3.0 C (nF) L Section 6.3.3 “Port B (SDAB, SCLB, C-bus and SMBus Maximum 2 ...

Page 7

... SCLB and SDAB in order to 2 C-bus rise time specification. is the maximum allowable capacitance load (include the capacitance of driver, is PU(min) Rev. 01 — 29 June 2009 PCA9527 2 C-bus and SMBus 2 C-bus Standard-mode and operates PU(max) © ...

Page 8

... Master devices can be placed on either bus. HDMI DDC applications for DVD/R and LCD TV are shown in transmitter or receiver is 3.3 V, while the DDC line PCA9527 behaves like a voltage level shift, a buffer and long cable bus extender to ensure signal integrity for accessing the EDID on the DDC line ...

Page 9

... The master drives the B bus to ground or lets it float the falling edge of the 8 SDAA on the A bus to ground, causing the PCA9527 to pull SDAB on the B bus to 0 the falling edge of the 9 the A bus. Multiple PCA9527 port A sides can be connected in a star configuration allowing all nodes to communicate with each other ...

Page 10

... SCLA SCLB SCL CECA CECB INT or PCA9527 RESET CC(A) CC(B) SDAA SDAB SDA SCLA SCLB SCL CECA CECB INT or PCA9527 RESET CC(A) CC(B) SDAA SDAB SDA SCLA SCLB SCL CECA CECB INT or PCA9527 RESET ...

Page 11

... NXP Semiconductors Fig 10. Typical application of PCA9527 driving a short cable SCLA SDAA Fig 11. Bus A (2 5.5 V bus) waveform SCLB SDAB Fig 12. Bus B (2 5.5 V) waveform PCA9527_1 Product data sheet 3-channel bidirectional bus extender for HDMI, I CARD CARD 9th clock pulse ...

Page 12

... Conditions Min 0.5 0.5 port B; port A; EN 0.5 port A; port operating in free air 40 - Min Typ 2.7 - [1] 2 CC(A) - 0.5 - 1 CC( CC(B) - 0.8 - 0.5 - 1.4 - 0.7 - 1.4 PCA9527 2 C-bus and SMBus Max Unit + 100 mA 100 mW +125 C +85 C +125 C Max Unit 3 0 1.2 mA 0.7 mA 2.2 mA 1.1 mA 2.2 mA © NXP B.V. 2009. All rights reserved. ...

Page 13

... pin only 3 3 Rev. 01 — 29 June 2009 PCA9527 2 C-bus and SMBus Min Typ 0.7V - CC(B) [2] 0.5 - 0.5 0 0.47 0. 0.7V - CC(A) [3] 0 ...

Page 14

... If the supply ramp up is slow, the rec(pd-act) time must be allowed before the inputs are switched. If the supply ramp up is slow, the rec(pd-act) Rev. 01 — 29 June 2009 PCA9527 2 C-bus and SMBus is for the second and subsequent LOW levels seen ILc ...

Page 15

... Fig 16. Propagation delay and transition times; PULSE GENERATOR R = load resistor; 1. port B (2 and 1 port A (5.0 V load capacitance includes jig and probe capacitance termination resistance should be equal Rev. 01 — 29 June 2009 PCA9527 2 C-bus and SMBus input 0.3V 0.3V CC(A) CC( PHL PLH 80 % ...

Page 16

... 0.30 0.23 3.1 3.1 0.5 0.15 0.15 2.9 2.9 REFERENCES JEDEC JEITA Rev. 01 — 29 June 2009 detail 5.0 0.7 0.95 0.1 0.1 0.1 4.8 0.4 EUROPEAN PROJECTION PCA9527 2 C-bus and SMBus SOT552 (1) Z 0.67 6 0.34 0 ISSUE DATE 99-07-29 03-02-18 © NXP B.V. 2009. All rights reserved ...

Page 17

... Solder bath specifications, including temperature and impurities PCA9527_1 Product data sheet 3-channel bidirectional bus extender for HDMI, I Rev. 01 — 29 June 2009 PCA9527 2 C-bus and SMBus © NXP B.V. 2009. All rights reserved ...

Page 18

... Lead-free process (from J-STD-020C) Package reflow temperature ( C) 3 Volume (mm ) < 350 260 260 250 Figure 19. Rev. 01 — 29 June 2009 PCA9527 2 C-bus and SMBus Figure 19) than a SnPb process, thus 350 220 220 350 to 2000 > 2000 260 260 250 245 245 245 © ...

Page 19

... High-Definition Multimedia Interface Inter Integrated Circuit bus Input/Output Liquid Crystal Display Machine Model Metal-Oxide Semiconductor Field-Effect Transistor Resistor-Capacitor network System Management Bus Set-Top Box Rev. 01 — 29 June 2009 PCA9527 2 C-bus and SMBus peak temperature time 001aac844 © NXP B.V. 2009. All rights reserved ...

Page 20

... Revision history Document ID Release date PCA9527_1 20090629 PCA9527_1 Product data sheet 3-channel bidirectional bus extender for HDMI, I Data sheet status Change notice Product data sheet - Rev. 01 — 29 June 2009 PCA9527 2 C-bus and SMBus Supersedes - © NXP B.V. 2009. All rights reserved ...

Page 21

... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 29 June 2009 PCA9527 2 C-bus and SMBus © NXP B.V. 2009. All rights reserved ...

Page 22

... NXP B.V. 2009. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com PCA9527 2 C-bus and SMBus All rights reserved. Date of release: 29 June 2009 Document identifier: PCA9527_1 ...

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