pca9521 NXP Semiconductors, pca9521 Datasheet

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pca9521

Manufacturer Part Number
pca9521
Description
Fast Dual Bidirectional Bus Buffer
Manufacturer
NXP Semiconductors
Datasheet

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1. General description
2. Features and benefits
The PCA9521 is a monolithic bipolar integrated circuit for bus buffering in applications
including I
The buffer extends the bus load limit by buffering both the SCL and SDA lines. It supports
up to 400 pF loads on each side of the buffer at 400 kHz. Higher capacitance is supported
at lower speeds, and lower capacitance at higher speeds up to 1 MHz.
The enable function allows sections of the bus to be isolated. Individual parts of the
system can be brought on-line successively. This means a controlled start-up using a
diverse range of components, operating speeds and loads is easily achieved. Systems
employing removable components on a back-plane (e.g., telecommunications racks) can
use the enable pin and the high-impedance ports on power-down to safely install and
remove components in active systems.
Bus level translation between a very wide range of bus voltages, from 1.8 V to 10 V, is
supported. This feature provides enormous flexibility in interfacing systems of different
technologies.
The unique operation of the PCA9521 provides one of the fastest response times of such
bidirectional buffers, ensuring any glitches (common to other buffers) are kept well within
the 50 ns I
accelerators’ which, combined with low noise margins, may cause glitches outside of the
I
2
C-bus specification.
PCA9521
Fast dual bidirectional bus buffer
Rev. 1 — 22 August 2011
Dual, bidirectional unity gain buffer
Fast switching times allow operation in excess of 1 MHz
Supports I
mode), PMBus and IPMB
Enable allows bus segments to be disconnected
Low standby current when not enabled
Application/removal of power to IC will not interfere with other bus activity
6 mA (static) pull-down capability supports a wide range of bus standards
Low noise susceptibility
Low input-output offset voltage
Threshold and offset parameters allow the connection of several devices in series
Bus levels independent of supply voltage
Operating voltages from 2.7 V to 5.5 V
Wide range of bus voltages from 1.8 V to 10 V
2
2
C-bus, SMBus, PMBus, and other systems based on similar principles.
C-bus specification. Additionally, it does this without the need for ‘rise-time
2
C-bus (Standard-mode and Fast-mode), SMBus (standard and high power
Product data sheet

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pca9521 Summary of contents

Page 1

... Bus level translation between a very wide range of bus voltages, from 1 supported. This feature provides enormous flexibility in interfacing systems of different technologies. The unique operation of the PCA9521 provides one of the fastest response times of such bidirectional buffers, ensuring any glitches (common to other buffers) are kept well within the accelerators’ ...

Page 2

... TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm All information provided in this document is subject to legal disclaimers. Rev. 1 — 22 August 2011 PCA9521 Fast dual bidirectional bus buffer Version SOT96-1 SOT505-1 © NXP B.V. 2011. All rights reserved. ...

Page 3

... 1 PCA9521 SA2 7 6 SB2 4 GND EN 1 SA1 2 PCA9521DP SA2 3 4 GND 002aaf279 Fig 3. Pin configuration for TSSOP8 [1] ) [1] ) [1] ) [1] ) PCA9521 R4 SCL SDA 002aaf280 SB1 6 SB2 5 n.c. © NXP B.V. 2011. All rights reserved ...

Page 4

... V , GND — supply pins CC The power supply voltage for the PCA9521 may be any voltage in the range 2 5.5 V. The threshold level below which the output will begin to match the input Hence, the operating voltage should be chosen with the required bus voltage, CC switching threshold, and noise margins, in mind ...

Page 5

... OL bus(in 1.2 mA 200 mV OL bus(in)  bus CC active standby V > 1 All information provided in this document is subject to legal disclaimers. Rev. 1 — 22 August 2011 PCA9521 Fast dual bidirectional bus buffer Min 0.3 [1] 0.3 [1] 0.3 [ 55 40 Min Typ 2 ...

Page 6

... 200 mV. amb bus(in)  V Offset voltage − 500 mV 2.7 V. bus(out) CC LOW-level output current versus ambient temperature PCA9521 Max Unit - 400 kHz - kHz s - s - 002aaf325 (kΩ) PU 002aaf284 100 150 T (°C) amb © ...

Page 7

... Input 33 pF (2) Output 120 pF Fig 9. Fall time (4 mA pull-up) All information provided in this document is subject to legal disclaimers. Rev. 1 — 22 August 2011 PCA9521 Fast dual bidirectional bus buffer 002aaf286 (2) (1) time (ns) © NXP B.V. 2011. All rights reserved ...

Page 8

... PCA9521 to run well in excess of the 400 kHz maximum limit of the Fast-mode I PCA9521 Product data sheet shows the PCA9521 level shifting signals from 1 3 MHz clock 2 C-bus specification. Rise times are determined simply by the side of 4.5 ...

Page 9

... The system shown here uses FET switches, however a valid alternative is to simply use 24  PCA9521’s without FET switches. Long track runs on the ShMC board and backplane can sometimes result in high frequency tuned circuits on either side of the PCA9521. If your layout is prone to forming such tuned circuits perfectly acceptable to use a ‘traditional’ damping resistor (Rd) across the PCA9521. ...

Page 10

... NXP Semiconductors Peripheral cards (or FRU (Field Replaceable Units)) and backplanes operating at a range of voltages can be interfaced together using a minimum of components. The PCA9521 can be teamed with the PCA9522 to achieve substantial noise margin gains across a system. Multiplexers such as the PCA9544A are simple analog switches which provide no capacitive load isolation between connected branches ...

Page 11

... SCL SA1 SA2 SDA SB1 SB2 PCA9521 EN U2 Alternately, using the PCA9546A (which allows multiple outputs to be selected) you would simply place a PCA9521 on each output on the right-hand side, rather than a single PCA9521 on the left-hand side R1 1.5 kΩ SCL SDA ...

Page 12

... SDA Fig 16. PCA9521 bus multiplexer application driven from an I 10.2 Input to output offset voltage calculation The offset voltage between the side acting as the output (Sxx(out)) and the side acting as the input (Sxx(in)) of the PCA9521 can be calculated using the relationship given in Equation V offset This calculation is valid for V the open-collector output drive transistor will begin to affect the characteristic ...

Page 13

... Fast dual bidirectional bus buffer θ detail 6.2 1.0 0.7 1.05 0.25 0.25 5.8 0.4 0.6 0.039 0.028 0.041 0.01 0.01 0.016 0.024 EUROPEAN PROJECTION PCA9521 SOT96 (1) θ 0.7 0.1 0 0.028 0.004 0.012 ISSUE DATE 99-12-27 03-02-18 © NXP B.V. 2011. All rights reserved ...

Page 14

... All information provided in this document is subject to legal disclaimers. Rev. 1 — 22 August 2011 Fast dual bidirectional bus buffer θ detail 5.1 0.7 0.94 0.1 0.1 0.1 4.7 0.4 EUROPEAN PROJECTION PCA9521 SOT505 (1) θ Z 0.70 6° 0.35 0° ISSUE DATE 99-04-09 03-02-18 © NXP B.V. 2011. All rights reserved ...

Page 15

... Package placement • Inspection and repair • Lead-free soldering versus SnPb soldering PCA9521 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 22 August 2011 PCA9521 Fast dual bidirectional bus buffer © NXP B.V. 2011. All rights reserved ...

Page 16

... Package reflow temperature (C) 3 Volume (mm ) < 350 260 260 250 Figure 19. All information provided in this document is subject to legal disclaimers. Rev. 1 — 22 August 2011 PCA9521 Fast dual bidirectional bus buffer Figure 19) than a SnPb process, thus  350 220 220 350 to 2000 > 2000 260 260 250 ...

Page 17

... C-bus IC IPMB PICMG PMBus RAID SMBus 15. Revision history Table 8. Revision history Document ID Release date PCA9521 v.1 20110822 PCA9521 Product data sheet maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature MSL: Moisture Sensitivity Level Abbreviations Description Advanced Telecommunications Computing Architecture ...

Page 18

... Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. All information provided in this document is subject to legal disclaimers. Rev. 1 — 22 August 2011 PCA9521 Fast dual bidirectional bus buffer © NXP B.V. 2011. All rights reserved ...

Page 19

... I C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 1 — 22 August 2011 PCA9521 Fast dual bidirectional bus buffer © NXP B.V. 2011. All rights reserved ...

Page 20

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com PCA9521 All rights reserved. Date of release: 22 August 2011 Document identifier: PCA9521 ...

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