pca9522 NXP Semiconductors, pca9522 Datasheet

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pca9522

Manufacturer Part Number
pca9522
Description
Fast Dual Bidirectional Bus Buffer With Hot Insertion Logic
Manufacturer
NXP Semiconductors
Datasheet
1. General description
2. Features and benefits
The PCA9522 is a monolithic bipolar integrated circuit for bus buffering in applications
including I
conditions, making it ideal for live insertion into backplanes. The buffer extends the bus
load limit by buffering both the SCL and SDA lines. The PCA9522 is a drop-in
replacement for the IES5502, with only the maximum bus voltage reduced from 15 V to
10 V.
Hot insertion logic allows the IC to be plugged into live backplanes without causing data
corruption on the bus. The open-collector ready signal (RDY) indicates when the
connection has been made. Precharging of the backplane ports minimizes disruptions to
the bus during hot insertion.
The enable function allows sections of the bus to be isolated. Individual parts of the
system can be brought on-line successively. Bus level translation between a very wide
range of bus voltages, from 1.8 V to 10 V, is supported. These features provide enormous
flexibility in interfacing systems of different technologies, operating speeds and loads.
The unique operation of the PCA9522 provides one of the fastest response times of such
bidirectional buffers. It does this without the need for rise-time accelerators which,
combined with low noise margins, may cause glitches outside of the I
PCA9522
Fast dual bidirectional bus buffer with hot insertion logic
Rev. 1 — 28 September 2011
Dual, bidirectional unity gain isolating buffer
Hot insertion logic prevents data and clock bus corruption for live backplane
applications
Pre-charge minimizes data corruption on live insertion
Supports I
modes) and PMBus
Open-collector ready output (RDY)
Fast switching times allow operation in excess of 1 MHz
Enable (EN) allows bus segments to be disconnected
Low current standby mode when not enabled
High-impedance ports when IC unpowered
6 mA (static) pull-down capability
Low noise susceptibility
Supports the connection of several buffers in series
Level shift bus voltages from 1.8 V to 10 V
2
C-bus, SMBus, etc. It includes hot insertion logic for detecting stop and idle
2
C-bus (Standard-mode and Fast-mode), SMBus (standard and high power
Product data sheet
2
C-bus specification.

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pca9522 Summary of contents

Page 1

... supported. These features provide enormous flexibility in interfacing systems of different technologies, operating speeds and loads. The unique operation of the PCA9522 provides one of the fastest response times of such bidirectional buffers. It does this without the need for rise-time accelerators which, combined with low noise margins, may cause glitches outside of the I 2 ...

Page 2

... undervoltage EN 1 HOT INSERT LOGIC SCLB 3 backplane V ref side SDAB 6 Block diagram of PCA9522 All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 September 2011 2 5 PCA9522 PRECHARGE 5 RDY 2 SCLC 7 SDAC ...

Page 3

... SDA buffer, backplane side 7 SDA buffer, card side 8 positive supply All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 September 2011 PCA9522 SCLC PCA9522DP SCLB GND 002aaf320 Fig 3. Pin configuration for TSSOP8 [1] [2] [2] [1] © NXP B.V. 2011. All rights reserved. ...

Page 4

... The EN pin may be pulled up higher than the V capability of the PCA9522 in a level shifting role. For example, a microprocessor could drive EN, SCLB and SDAB while the buffer V 3.3 V. Similarly, the threshold level of the EN pin allows a 1.8 V device to enable an PCA9522 with a V PCA9522 Product data sheet Fast dual bidirectional bus buffer with hot insertion logic Figure 1 “ ...

Page 5

... During power-up or live insertion into backplanes, the PCA9522 will start- UnderVoltage LockOut (UVLO) state where any activity on the input/output ports will be ignored. This is to ensure that the PCA9522 does not try to operate when there is not enough voltage on the supply. During this time, the precharge circuit will charge all SCLB/SDAB backplane ports to typically 0 ...

Page 6

... k; CC bus pu(bus 120 pF; Figure 4 L(ext k; CC bus pu(bus 120 pF; Figure 4 L(ext) All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 September 2011 PCA9522 Min Typ Max Unit 2 A - 520 - - 2 0.  ...

Page 7

...  200 mV. amb bus(in)  V Offset voltage 002aaf326 100 150 T (°C) PCA9522 Max Unit s 150 s 120 s - s - s - s - 002aaf325 (kΩ) PU © NXP B.V. 2011. All rights reserved ...

Page 8

... V. Cards operating buses between 1.8 V and 10 V can be catered for in the same system. Each card can be safely isolated from the system by disabling the PCA9522 at the interface to the backplane. The hot insertion logic on the PCA9522 protects against corrupted or truncated data transmissions on start-up of buffer operations. ...

Page 9

... NXP Semiconductors Fig 8. An ideal backplane application for the PCA9522 is the Advanced Telecom Computing Architecture (AdvancedTCA) as shown in placement on ‘Field Replaceable Units’ (FRUs) used in either a conventional fully-bused arrangement (not shown the low cost, high noise margin radial architecture example as shown in required, accelerating the rise in bused systems ...

Page 10

... PCA9521. If your layout is prone to forming such tuned circuits perfectly acceptable to use a ‘traditional’ damping resistor (Rd) across the PCA9521. (1) RRA = Rise Rate Accelerator. Fig 9. PCA9522 used in an AdvancedTCA application in conjunction with the PCA9521 Fig 10. Discrete rise rate accelerator circuit example PCA9522 Product data sheet ...

Page 11

... NXP Semiconductors 10.2 Input to output offset voltage calculation The offset voltage between the side acting as the output (Sxxx(out)) and the side acting as the input (Sxxx(in)) of the PCA9522 can be calculated using the relationship given in Equation V offset This calculation is valid for V the open-collector output drive transistor will begin to affect the characteristic. Input and output voltages are shown in millivolts ohms ...

Page 12

... Rev. 1 — 28 September 2011 θ detail 6.2 1.0 0.7 1.05 0.25 0.25 5.8 0.4 0.6 0.039 0.028 0.041 0.01 0.01 0.016 0.024 EUROPEAN PROJECTION PCA9522 SOT96 (1) θ 0.7 0.1 0 0.028 0.004 0.012 ISSUE DATE 99-12-27 03-02-18 © NXP B.V. 2011. All rights reserved ...

Page 13

... All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 September 2011 θ detail 5.1 0.7 0.94 0.1 0.1 0.1 4.7 0.4 EUROPEAN PROJECTION PCA9522 SOT505 (1) θ Z 0.70 6° 0.35 0° ISSUE DATE 99-04-09 03-02-18 © NXP B.V. 2011. All rights reserved ...

Page 14

... Inspection and repair • Lead-free soldering versus SnPb soldering PCA9522 Product data sheet Fast dual bidirectional bus buffer with hot insertion logic All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 September 2011 PCA9522 © NXP B.V. 2011. All rights reserved ...

Page 15

... Package reflow temperature (C) 3 Volume (mm ) < 350 260 260 250 Figure 13. All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 September 2011 PCA9522 Figure 13) than a SnPb process, thus  350 220 220 350 to 2000 > 2000 260 260 250 245 245 245 © ...

Page 16

... PCI Industrial Computer Manufacturers Group Power Management Bus Redundant Array of Independent Discs Rise Time Accelerator Shelf Management Controller System Management Bus All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 September 2011 PCA9522 peak temperature time 001aac844 © NXP B.V. 2011. All rights reserved ...

Page 17

... System Management Bus (SMBus) Specification — Version 2.0, August 3, 2000; SBS Implementers Forum. 16. Revision history Table 8. Revision history Document ID Release date PCA9522 v.1 20110928 PCA9522 Product data sheet Fast dual bidirectional bus buffer with hot insertion logic 2 C-bus specification and user manual — , Rev 03, 19 June 2007; ...

Page 18

... Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 September 2011 PCA9522 © NXP B.V. 2011. All rights reserved ...

Page 19

... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 September 2011 PCA9522 © NXP B.V. 2011. All rights reserved ...

Page 20

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com PCA9522 All rights reserved. Date of release: 28 September 2011 Document identifier: PCA9522 ...

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