tda8752ah/6 NXP Semiconductors, tda8752ah/6 Datasheet - Page 25

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tda8752ah/6

Manufacturer Part Number
tda8752ah/6
Description
Triple High-speed Analog-to-digital Converter Adc
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
1999 Feb 24
t
t
t
ADCs
f
INL
DNL
ENOB
Signal-to-noise ratio
S/N
Spurious free dynamic range
SFDR
Clock timing output (CKADCO, CKBO and CKAO)
f
Clock timing input (CKEXT)
f
t
t
t
COAST(max)
recap
cap
s
CLK(max)
CLK(max)
CPH
CPL
d(CLKO)
SYMBOL
ext
Triple high-speed Analog-to-Digital
Converter (ADC)
step
maximum coast mode time
PLL recapture time
PLL capture time
phase shift step
maximum sampling frequency TDA8752A/6
DC integral non linearity
DC differential non linearity
effective number of bits
signal-to-noise ratio
spurious free dynamic range
ADC clock duty cycle
maximum clock frequency
maximum clock frequency
clock pulse width HIGH
clock pulse width LOW
delay from CKEXT to
CKADCO
PARAMETER
when coast mode is aborted
in start-up conditions
T
TDA8752A/8
from IC analog input to
digital output; ramp input;
f
from IC analog input to
digital output; ramp input;
f
from IC analog input to
digital output; 10 kHz sine
wave input; ramp input;
f
maximum gain;
f
minimum gain;
f
maximum gain;
f
minimum gain;
f
100 MHz output
INV set to LOW
INV set to HIGH
CLK
CLK
CLK
CLK
CLK
CLK
CLK
amb
= 100 MHz
= 100 MHz
= 100 MHz; note 1
= 100 MHz
= 100 MHz
= 100 MHz
= 100 MHz
= 25 C
CONDITIONS
25
60
100
45
100
100
3.6
4.5
13.6
MIN.
3
11.25
7.4
45
44
60
60
50
14.7
14.7
0.5
0.5
TYP.
+
t
---------- -
CLK
2
Product specification
40
5
55
15.2
TDA8752A
1.5
1.0
MAX.
lines
lines
ms
deg
MHz
MHz
LSB
LSB
bits
dB
dB
dB
dB
%
MHz
MHz
ns
ns
ns
ns
UNIT

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