e-sta2051tr STMicroelectronics, e-sta2051tr Datasheet

e-sta2051tr

Manufacturer Part Number

e-sta2051tr

Description

32-bit Single Chip Baseband Controller For Gps And Telematic Applications

Manufacturer

STMicroelectronics

Datasheet

1.E-STA2051TR.pdf (5 pages)

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Download datasheet (159Kb)

■

January 2006

For further information contact your local STMicroelectronics sales office.

Suitable for Automotive Applications

ARM7TDMI 16/32 bit RISC CPU based host

microcontroller.

Complete Embedded Memory System:

– FLASH 256K bytes + 16K bytes (100K eras-

– RAM 64K bytes.

External memory interface provides glueless

support for up to four banks of external SRAM,

FLASH, ROM.

12 channel GPS correlation DSP: – no TCXO

required

– RTCA-SC159 / WAAS / EGNOS support

GPS performance

– accuracy: stand alone <30m; differential

– time to first fix: autonomous start 90s; cold

CMOS M8T (0.18 um) technology.

-40°C to 85°C operating temperature range.

144-pin TQFP144 package or 64-pin TQFP64

package

Power Supply:

– 2.7V to 3.6V operating supply range for Input/

– 3 V to 3.6V operating supply range for A/ D

– 1.8V operating supply range for core supply

0-66MHz internal clock frequency managed by

a Reset and Clock Control Unit; the unitisable to

provide low power modes (WAIT, SLOW,

STOP, STANDBY) and to generate the internal

clock from the external reference through

integrated PLL.

48 programmable General Purpose I/O, each

pin programmable independently as digital input

or digital output; 40 (30 in TQFP64) are

multiplexed with peripheral functions; 16 can

generate an interrupt on input level/transition.

Real time clock module with 3 2 KHz low power

oscillator and separate power supply to

FEATURES

ing/programming cycles)

<1m; surveying <1cm

start 45s; warm start 7s; obscuration 1s.

Output periphery

Converter reference

provided either by internal Voltage Regulator

with external stabilization capacitor, or by ex-

ternal supply for higher power efficiency.

32-BIT SINGLE CHIP BASEBAND CONTROLLER

FOR GPS AND TELEMATIC APPLICATIONS

■

Figure 1. Packages

Table 1. Order Codes

continue running during stand-by mode.

16-bit Watchdog Timer with 8 bits prescaler for

system reliability and integrity.

CAN module compliant with the CAN

specification V2.0 part B (active). The bit rate

can be programmed up to 1 MBaud.

Four16-bit programmable Timers with 7 bit

prescaler, up to two input capture/output

compare, one pulse counter function, one PWM

channel with selectable frequency each.

4 channels 12-bit sigma-delta Analog to Digital

Converter, single channel or multi channel

conversion modes, single-shotor continuous

conversion modes, sample rate1KHz (4 KHz

when single channel), conversion range 0-2.5V.

Three Serial Communication Interfaces (UART)

allow full duplex, asynchronous,

communications with external devices,

independently programmable TX and RX baud

rates up to 625K baud.

One UART adapted to suit Smart Card interface

needs, for asynchronous SC as defined by ISO

7816-3; it includes SC clock generation.

Two Serial Peripheral Interfaces (SPI) allow full

duplex, synchronous communications with

external devices, master or slave operation,

max baud rate: 8Mb/s. One SPI may be used as

Multimedia Card interface.

Two I

slave functions, support normal and fast I

Part Number

STA2051E

STA2051

C Interfaces provide multi-master and

TQFP64

VESPUCCI

STA2051

TQFP144

Package

TQFP64

DATA BRIEF

Rev. 2

1/5

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e-sta2051tr Summary of contents

Page 1

... Power Supply: ■ – 2.7V to 3.6V operating supply range for Input/ Output periphery – 3.6V operating supply range for A/ D Converter reference – 1.8V operating supply range for core supply provided either by internal Voltage Regulator with external stabilization capacitor ex- ternal supply for higher power efficiency. ...

Page 2

... USB unit V1.1 compliant, software configurable end point setting, USB Suspend/Resume support. ■ (TQFP144 only) High Level Data Link Controller (HDLC) unit supports full duplex operating mode, NRZ, NRZI, FM0 and ■ MANCHESTER modes, internal 8bit Baud Rate Generator. Figure 2. System Block Diagram ...

Page 3

... Figure 3. TQFP144 Pins Connection Diagram (Top view) STA2051 - VESPUCCI 3/5 ...

Page 4

... STA2051 - VESPUCCI Figure 4. TQFP64 Pins Connection Diagram (Top view) Table 2. Revision History Date Revision September 2004 January 2006 4/5 1 First Issue 2 Added a new feature (first bullet). Description of Changes ...

Page 5

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