max5934aeeet Maxim Integrated Products, Inc., max5934aeeet Datasheet - Page 7

• Manufacturer Part Number: max5934aeeet
• Description: Max5934, Max5934a Positive High-voltage, Hot-swap Controllers With Selectable Fault Management And Status Polarity
• Manufacturer: Maxim Integrated Products, Inc.

Selectable Fault Management and Status Polarity
Positive High-Voltage, Hot-Swap Controllers with
PIN
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
POL_SEL
PWRGD2
PWRGD1
PWRGD3
LATCH/
SENSE
RETRY
NAME
TIMER
GATE
GND
OUT
N.C.
FB1
FB2
V
ON
DC
CC
_______________________________________________________________________________________
Circuit-Breaker Fault-Management Select Input. Connect LATCH/RETRY to GND to latch off after a circuit-
breaker fault. Leave LATCH/RETRY open or drive to logic-high voltage for automatic restart after a circuit-
breaker fault.
On/Off Control Input. ON implements the undervoltage-lockout threshold and resets the part after a fault
latch (see the Fault Management ( LATCH /RETRY) section).
PWRGD_ Polarity Select Input. Leave POL_SEL open or drive to logic-high voltage for PWRGD_ asserted
high. Connect POL_SEL to GND for PWRGD_ asserted low.
Power-Good Comparator Input. Connect a resistive divider between output, FB1, and GND to monitor the
output voltage (see the Power-Good (PWRGD_ ) Detection section). FB1 is also used as feedback for the
current-limit foldback function.
Open-Drain Power-Good Output. POL_SEL determines the output polarity of PWRGD2. PWRGD2 is
asserted when FB2 is higher than V
Power-Good (PWRGD_) Detection section).
Open-Drain Power-Good Output. POL_SEL determines the output polarity of PWRGD1. PWRGD1 is
asserted when FB1 is higher than V
Power-Good (PWRGD_) Detection section).
Open-Drain Power-Good Output. POL_SEL determines the output polarity of PWRGD3. PWRGD3 asserts
when GATE is at maximum voltage. PWRGD3 deasserts after the timeout following an overcurrent event
(see the Power-Good (PWRGD_) Detection section).
Ground
Output Voltage. OUT is used as the return path for the internal GATE protection clamping circuitry.
Timing Input. Connect a capacitor from TIMER to GND to program the maximum time the part is allowed to
remain in current limit (see the TIMER section).
Gate-Drive Output. The high-side gate drive for the external n-channel MOSFET (see the GATE section).
Noninverting Comparator Input. FB2 is used to monitor any other voltage in the system. When FB2 rises
higher than V
No Connection. Not internally connected.
Current-Sense Input. Connect a sense resistor from V
MOSFET.
Duty-Cycle Select. When DC is floating, the default duty cycle is 3.75%. Connect DC to V
cycle to 1.88%. Connect DC to GND to set the duty cycle to 0.94%.
Power-Supply Input. Bypass V
+80V for the MAX5934A and +33V to +80V for the MAX5934.
FB2H
, PWRGD2 asserts. When FB2 drops below V
CC
to GND with a 0.1µF capacitor. The input voltage range is from +9V to
FB2H
FB1H
. PWRGD2 deasserts when FB2 is lower than V
. PWRGD1 deasserts when FB1 is lower than V
FUNCTION
CC
to SENSE and the drain of the external n-channel
FB2L
, PWRGD2 deasserts.
Pin Description
FB2L
FB1L
CC
(see the
(see the
to set the duty
7