max5936anesat Maxim Integrated Products, Inc., max5936anesat Datasheet - Page 7

• Manufacturer Part Number: max5936anesat
• Description: -48v Hot-swap Controllers With Vin Step Immunity And No Rsense
• Manufacturer: Maxim Integrated Products, Inc.

The MAX5936/MAX5937 hot-swap controllers incorpo-
rate overcurrent fault management and are intended for
negative-supply-rail applications. The MAX5936/
MAX5937 eliminate the need for an external R
and include V
which prevents powering up into a shorted load. They
are intended for negative 48V telecom power systems
where low cost, flexibility, multifault management, and
compact size are required. The MAX5936/MAX5937 are
ideal for the widest range of systems from those
requiring low current with small MOSFETs to high-
current systems requiring large power MOSFETs and
low on-resistance.
The MAX5936/MAX5937 control an external n-channel
power MOSFET placed in the negative supply path of
an external load. When no power is applied, the GATE
output of the MAX5936/MAX5937 clamps the V
MOSFET to 2V, keeping the MOSFET turned off. When
power is applied to the MAX5936/MAX5937, the 2V
MAX5936
—
1
2
3
4
5
6
7
8
PIN
MAX5937
IN
—
1
2
3
4
5
6
7
8
input-step protection and load probe,
_______________________________________________________________________________________
Detailed Description
STEP_MON
PGOOD
PGOOD
NAME
UVLO
GATE
V
GND
V
LP
OUT
EE
-48V Hot-Swap Controllers with V
Ground. The high-supply connection for a negative-rail hot-swap controller.
Undervoltage Lockout Input, On/Off Control. Referenced to V
1.25V rising threshold to turn on the device. To turn off the device, drive UVLO below the
1.125V falling threshold for the 1.5ms glitch rejection period. Leave UVLO disconnected for
the default 31V undervoltage lockout threshold. Cycle UVLO to unlatch the MAX5936L/
MAX5937L after a fault. Cycling UVLO low deasserts PGOOD.
Input Voltage Step Monitor. 1.25V voltage threshold referenced to V
between STEP_MON and V
STEP_MON to adjust the step response relative to a step increase at V
circuit-breaker and short-circuit faults. Connect to V
(see the Selecting Resistor and Capacitor Values for Step Monitor section in the
Applications Information).
Negative Input Voltage
Load-Probe Detect. Connect a resistor from LP to V
Limit load-probe test current to 1A. Connect to V
Gate-Drive Output. Connect to the gate of the external n-channel MOSFET.
Output Voltage Sense. V
external n-channel MOSFET.
Power-Good, Active-Low, Open-Drain Output. Referenced to V
when V
Power-Good, Active-High, Open-Drain Output. Referenced to V
when V
OUT
OUT
Step Immunity and No R
is within the limits and there is no fault.
is within limits and there is no fault.
GS
SENSE
of the
OUT
EE
is the negative rail of the load. Connect to the drain of the
clamp at the GATE output is replaced by a strong pull-
down device pulling GATE to V
MOSFET to 0V. As shown in Figure 2, this transition
enables the MAX5936/MAX5937 to keep the power
MOSFET continually off during the board insertion
phase when the circuit board first makes contact with
the backplane. Without this clamp, the GATE output of
a powered-down controller would be floating and the
MOSFET reverse transfer capacitance (gate-to-drain)
would pull up and turn on the MOSFET gate when the
MOSFET drain is rapidly pulled up by the V
ing backplane contact. The MAX5936/MAX5937 GATE
clamp can overcome the gate-to-drain capacitance of
large power MOSFETs with added slew-rate control
(C
tional gate-to-source capacitance. The MAX5936/
MAX5937 will keep the MOSFET off indefinitely if the
supply voltage is below the user-set UVLO threshold or
if a short circuit is detected in the load connected to the
drain of the power MOSFET.
to set the step sensitivity. Connect a capacitor from GND to
SLEW
) capacitors while eliminating the need for addi-
FUNCTION
EE
OUT
EE
to disable the load-probe function.
to disable the step immunity function
to set the load-probe test current.
EE
OUT
. Drive UVLO above the
OUT
Pin Description
. PGOOD asserts low
EE
. PGOOD asserts high
EE
. Connect a resistor
EE
and the V
to eliminate false
SENSE
IN
GS
step dur-
of the
IN
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