m41t80 STMicroelectronics, m41t80 Datasheet - Page 12
m41t80
Manufacturer Part Number
m41t80
Description
Serial Access Real Time Clock With Alarm
Manufacturer
STMicroelectronics
Datasheet
1.M41T80.pdf
(25 pages)
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Operation
2.3
Figure 10. WRITE mode sequence
12/25
BUS ACTIVITY:
MASTER
SDA LINE
BUS ACTIVITY:
WRITE mode
In this mode the master transmitter transmits to the M41T80 slave receiver. Bus protocol is
shown in
and slave address, a logic '0' (R/W=0) is placed on the bus and indicates to the addressed
device that word address “An” will follow and is to be written to the on-chip address pointer.
The data word to be written to the memory is strobed in next and the internal address
pointer is incremented to the next address location on the reception of an acknowledge
clock. The M41T80 slave receiver will send an acknowledge clock to the master transmitter
after it has received the slave address see
again after it has received the word address and each data byte.
S
Figure 10: WRITE mode sequence on page
ADDRESS
SLAVE
ADDRESS (An)
WORD
DATA n
Figure 7: Slave address location on page 11
12. Following the START condition
DATA n+1
DATA n+X
AI00591
M41T80
P
and