pca82c200t NXP Semiconductors, pca82c200t Datasheet - Page 43
pca82c200t
Manufacturer Part Number
pca82c200t
Description
8-bit Microcontroller With On-chip Can
Manufacturer
NXP Semiconductors
Datasheet
1.PCA82C200T.pdf
(108 pages)
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Philips Semiconductors
13.5.9
The contents of Bus Timing Register 0 defines the values
of the Baud Rate Prescaler (BRP) and the Synchronization
Jump Width (SJW).
Table 45 Bus Timing Register 0 (address 6)
Table 46 Description of the BTR0 bits
1996 Jun 27
8-bit microcontroller with on-chip CAN
SJW.1
BIT
7
7
6
5
4
3
2
1
0
B
US
T
IMING
SJW.1
SJW.0
BRP.5
BRP.4
BRP.3
BRP.2
BRP.1
BRP.0
SYMBOL
SJW.0
R
6
EGISTER
Synchronization Jump Width. To compensate for phase shifts between clock
oscillators of different bus controllers, any bus controller must resynchronize on any
relevant signal edge of the current transmission. The synchronization jump width
defines the maximum number of clock cycles a bit period may be shortened or
lengthened by one resynchronization:
Baud Rate Prescaler. The period of the system clock t
determines the individual bit timing.The system clock is calculated using the following
equation:
Where t
t
t
0 (BTR0)
SJW
SCL
BRP.5
=
5
=
CLK
2t
t
SCL
CLK
= time period of the P8xCE598 oscillator.
2SJW.1
32BRP.5
BRP.4
4
+
SJW.0
+
16BRP.4
43
This register can be accessed (read/write) if the Reset
Request bit is set HIGH (present).
For further information on bus timing, see
Sections 13.5.10 and 13.5.18.
+
BRP.3
1
3
+
FUNCTION
8BRP.3
+
BRP.2
4BRP.2
2
SCL
+
2BRP.1
is programmable and
BRP.1
1
+
Product specification
BRP.0
P8xCE598
+
BRP.0
1
0
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