pcf8583 NXP Semiconductors, pcf8583 Datasheet - Page 15

• Manufacturer Part Number: pcf8583
• Description: Clock/calendar With 240 X 8-bit Ram
• Manufacturer: NXP Semiconductors

Philips Semiconductors
8.3
A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls
the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’.
8.4
The number of data bytes transferred between the start
and stop conditions from transmitter to receiver is
unlimited. Each byte of eight bits is followed by an
acknowledge bit. The acknowledge bit is a HIGH level
signal put on the bus by the transmitter during which time
the master generates an extra acknowledge related clock
pulse. A slave receiver which is addressed must generate
an acknowledge after the reception of each byte. Also a
master receiver must generate an acknowledge after the
reception of each byte that has been clocked out of the
slave transmitter.
1997 Jul 15
Clock/calendar with 240
System configuration (see Fig.14)
Acknowledge (see Fig.15)
SDA
SCL
TRANSMITTER /
BY TRANSMITTER
RECEIVER
MASTER
DATA OUTPUT
DATA OUTPUT
BY RECEIVER
SCL FROM
MASTER
CONDITION
START
RECEIVER
Fig.15 Acknowledgment on the I
S
SLAVE
8-bit RAM
Fig.14 System configuration.
1
TRANSMITTER /
RECEIVER
15
SLAVE
The device that acknowledges must pull down the SDA
line during the acknowledge clock pulse, so that the SDA
line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times
must be taken into consideration). A master receiver must
signal an end of data to the transmitter by not generating
an acknowledge on the last byte that has been clocked out
of the slave. In this event the transmitter must leave the
data line HIGH to enable the master to generate a stop
condition.
2
2
C-bus.
TRANSMITTER
MBC602
not acknowledge
MASTER
acknowledge
8
acknowledgement
clock pulse for
TRANSMITTER /
9
RECEIVER
MASTER
Product specification
PCF8583
MBA605