pcf8536 NXP Semiconductors, pcf8536 Datasheet - Page 46

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pcf8536

Manufacturer Part Number
pcf8536
Description
Universal Lcd Driver For Low Multiplex Rates Including A 6 Channel Pwm Generator
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
9. Bus interfaces
PCF8536
Product data sheet
9.1 Control byte and register selection
9.2 I
After initiating the communication over the bus and sending the slave address (I
see
purpose of this byte is to indicate both, the content for the following data bytes (RAM,
command, or PWM data) and to indicate that more control bytes will follow.
Typical sequences could be:
In this way, it is possible to send a mixture of RAM, PWM and command data in one
access or alternatively, to send just one type of data in one access.
Table 36.
The I
The two lines are a Serial DAta line (SDA) and a Serial CLock line (SCL). Both lines must
be connected to a positive supply via a pull-up resistor when connected to the output
stages of a device. Data transfer may be initiated only when the bus is not busy.
Bit
7
6 to 5
4 to 0
2
Fig 31. Control byte format
C-bus interface
Slave address/subaddress - control byte - command byte - command byte - command
byte - end
Slave address/subaddress - control byte - RAM byte - RAM byte - RAM byte - end
Slave address/subaddress - control byte - command byte - control byte - RAM byte -
end
Section
2
C-bus is for bidirectional, two-line communication between different ICs or modules.
Symbol
CO
RS[1:0]
-
Control byte description
9.2) or subaddress (SPI-bus, see
All information provided in this document is subject to legal disclaimers.
Universal LCD low multiplex driver with 6 channel PWM generator
Rev. 1 — 6 October 2011
MSB
Value
0
1
00
01
10
11
-
CO
7
RS[1:0]
6
5
4
Description
continue bit
register selection
unused
Section
3
not relevant
last control byte
control bytes continue
command register
RAM data
PWM data
unused
2
1
013aaa461
9.3), a control byte follows. The
0
LSB
PCF8536
© NXP B.V. 2011. All rights reserved.
2
C-bus,
46 of 74

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