pcf8564a NXP Semiconductors, pcf8564a Datasheet - Page 23
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
pcf8564a
Manufacturer Part Number
pcf8564a
Description
Real Time Clock And Calendar
Manufacturer
NXP Semiconductors
Datasheet
1.PCF8564A.pdf
(44 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
pcf8564aCX9/B/1
Manufacturer:
NXP
Quantity:
20 319
NXP Semiconductors
10. I
PCF8564A_1
Product data sheet
2
C-bus protocol
10.1 Addressing
10.2 Clock and calendar READ or WRITE cycles
Before any data is transmitted on the I
addressed first. The addressing is always carried out with the first byte transmitted after
the start procedure.
The PCF8564A acts as a slave receiver or slave transmitter. Therefore, the clock signal
SCL is only an input signal, but the data signal SDA is a bidirectional line.
Two slave addresses are reserved for the PCF8564A:
The PCF8564A slave address is shown in
Figure
PCF8564A READ and WRITE cycles. The word address is a 4-bit value that defines
which register is to be accessed next. The upper four bits of the word address are not
used.
Fig 16. Slave address
Fig 17. Master transmits to slave receiver (WRITE mode)
Read: A3h (1010 0011)
Write: A2h (1010 0010)
17,
Figure
S
SLAVE ADDRESS
18, and
Rev. 1 — 8 October 2009
Figure 19
acknowledgement
R/W
from slave
0 A
1
group 1
0
show the I
WORD ADDRESS
2
1
C-bus, the device which should respond is
0
Figure
0
2
acknowledgement
C-bus configuration for the different
group 2
15.
from slave
0
A
1
mce189
R/W
Real time clock and calendar
n bytes
DATA
memory word address
auto increment
PCF8564A
acknowledgement
from slave
© NXP B.V. 2009. All rights reserved.
A
mbd822
P
23 of 44