74lvth646 Fairchild Semiconductor, 74lvth646 Datasheet - Page 2

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74lvth646

Manufacturer Part Number
74lvth646
Description
Low Voltage Octal Transceiver/register With 3-state Outputs
Manufacturer
Fairchild Semiconductor
Datasheet
www.fairchildsemi.com
Connection Diagram
Truth Table
(Note 1)
H
Note 1: The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled; i.e.,
data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
HIGH Voltage Level
OE
H
H
H
L
L
L
L
L
L
L
L
DIR
H
H
H
H
X
X
X
L
L
L
L
CPAB
H or L
H or L



X
X
X
X
X
X
L
Inputs
LOW Voltage Level
CPBA
H or L
H or L



X
X
X
X
X
X
SAB SBA
X
X
X
H
H
X
X
X
X
L
L
X
X
X
X
X
X
X
X
H
H
L
L
Immaterial
Output
A
Input
Input
0
–A
Data I/O
7

2
Pin Descriptions
LOW-to-HIGH Transition
Output
B
Input
Input
0
–B
7
A
B
CPAB, CPBA
SAB, SBA
OE
DIR
0
0
–A
–B
Isolation
Clock A
Clock B
A
Clock A
A Register to B
Clock A
B
Clock B
B Register to A
Clock B
Pin Names
n
n
7
7
to B
to A
n
n
n
n
n
n
n
n
—Real Time (Transparent Mode)
—Real Time (Transparent Mode)
Data into A Register
Data into B Register
Data into A Register
Data into A Register and Output to B
Data into B Register
Data into B Register and Output to A
n
n
Data Register A Inputs
Data Register A Outputs
Data Register B Inputs
Data Register B Outputs
Clock Pulse Inputs
Transmit/Receive Inputs
Output Enable Input
Direction Control Input
(Stored Mode)
(Stored Mode)
Function
Description
n
n

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