m4t28-br12sh6tr STMicroelectronics, m4t28-br12sh6tr Datasheet - Page 11

• Manufacturer Part Number: m4t28-br12sh6tr
• Description: 64 Kbit 8kb X8 Timekeeper Sram With Address/data Multiplexed
• Manufacturer: STMicroelectronics

For more information on calibration, see the Appli-
cation Note AN934 "TIMEKEEPER Calibration".
The IRQ/FT pin is an open drain output which re-
quires a pull-up resistor for proper operation. A
500-10k
control the rise time.
SETTING ALARM CLOCK
Registers 1FF5h-1FF2h contain the alarm set-
tings. The alarm can be configured to go off at a
prescribed time on a specific day of the month or
repeat every day, hour, minute, or second. It can
also be programmed to go off while the M48T559Y
is in the battery back-up mode of operation to
serve as a system wake-up call.
RPT1-RPT4 put the alarm in the repeat mode of
operation. Table 11 shows the possible configura-
tions. Codes not listed in the table default to the
once per second mode to quickly alert the user of
an incorrect alarm setting.
Note: User must transition address (or toggle chip
enable) to see Flag bit change.
When the clock information matches the alarm
clock settings based on the match criteria defined
by RPT1-RPT4, AF (Alarm Flag) is set. If AFE
(Alarm Flag Enable) is also set, the alarm condi-
tion activates the IRQ/FT pin. To disable alarm,
write ’0’ to the Alarm Date registers and RPT1-4.
The alarm flag and the IRQ/FT output are cleared
by a read to the Flags register as shown in Figure
11.
Figure 10. Interrupt Reset Waveforms
resistor is recommended in order to
AD0-AD7
R
ACTIVE FLAG BIT
IRQ/FT
ADDRESS 1FF0h
Note: If an alarm condition occurs while the flags
register address is latched into the address buffer,
the alarm flag will not be set until an address other
than the flags register (1FF0h) is latched into the
address buffer. This will insure that the alarm flag
will not be inadvertently reset while reading the
flag register. To properly check to see if an alarm
condition has occurred while reading the flag reg-
ister, the user is required to latch, read or write to
an alternate address and then re-read the alarm
flag.
The IRQ/FT pin can also be activated in the bat-
tery back-up mode. The IRQ/FT will go low if an
alarm occurs and both ABE (Alarm in Battery
Back-up Mode Enable) and AFE are set. The ABE
and AFE bits are reset during power-up, therefore
an alarm generated during power-up will only set
AF. The user can read the Flag Register at system
boot-up to determine if an alarm was generated
while the M48T559Y was in the deselect mode
during power-up. Figure 12 illustrates the back-up
mode alarm timing.
Table 11. Alarm Repeat Mode
RPT4
1
1
1
1
0
RPT3
1
1
1
0
0
RPT2
1
1
0
0
0
RPT1
AI01677B
1
0
0
0
0
Once per Second
Once per Minute
Once per Hour
Once per Day
Once per Month
Alarm Activated
M48T559Y
11/18