stcd1020 STMicroelectronics, stcd1020 Datasheet - Page 4

• Manufacturer Part Number: stcd1020
• Description: Multi-channel Clock Distribution Circuit
• Manufacturer: STMicroelectronics

List of figures
Figure 1.
Figure 2.
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Figure 6.
Figure 7.
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Figure 12.
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Figure 25.
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Figure 28.
Figure 29.
4/40
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connections diagram (STCD1020, 2-channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connections diagram (STCD1030, 3-channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Connections diagram (STCD1040, 4-channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Typical application circuit using STCD1040 for RF ends of TD-SCDMA/GSM dual mode
mobile phone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Typical application circuit using STCD1040 for baseband peripherals in mobile phone . . 12
Direct connection of the source clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Connection of the DC-CUT capacitor and bias. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Quiescent current (I
EN1=EN2=EN3=EN4=1, no master clock input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Quiescent current (I
EN1=EN2=EN3=EN4=1, C
Standy current (I
EN1=EN2=EN3=EN4=0, no master clock input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Active current (I
EN1=EN2=EN3=EN4=1, 26 MHz sine wave master clock input from TCXO) . . . . . . . . . . 19
Active current (I
EN1=EN2=EN3=EN4=1, 26 MHz sine wave master clock input) . . . . . . . . . . . . . . . . . . . . 20
Active current (I
EN1=EN2=EN3=EN4=1, master clock input Vpp = 1 V) . . . . . . . . . . . . . . . . . . . . . . . . . . 20
STCD10x0 recovery time from standby to active (STCD1040, 2.8 V version,
EN2=EN3=EN4=0, measure CLK1 when EN1 from 0 to 1) . . . . . . . . . . . . . . . . . . . . . . . . 21
STCD10x0 buffer recovery time from off to on (STCD1040, 2.8 V version,
EN2=EN3=EN4=1, measure CLK1 when EN1 from 0 to 1) . . . . . . . . . . . . . . . . . . . . . . . . 21
Sine wave input clock vs. output clock (STCD1040, 2.8 V version, 26 MHz sine wave
master clock input from TCXO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Rise and fall time for square wave output (STCD1040, 2.8 V, 10 MHz square wave
master clock input, C
Input clock phase noise (STCD1040, 2.8 V version, 26 MHz master clock input
from TCXO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Output clock phase noise (STCD1040, 2.8V version, this phase noise includes the
additive phase noise from TCXO and STCD1040) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Clock bandwidth (STCD1040, 2.8 V version, C
Quiescent current (I
EN1=EN2=EN3=EN4=1, no master clock input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Quiescent current (I
EN1=EN2=EN3=EN4=1, C
Standby current (I
EN1=EN2=EN3=EN4=0, no master clock input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Active current (I
EN1=EN2=EN3=EN4=1, 26 MHz sine wave master clock input from TCXO) . . . . . . . . . . 26
Active current (I
EN1=EN2=EN3=EN4=1, 26 MHz sine wave master clock input) . . . . . . . . . . . . . . . . . . . . 26
Active current (I
EN1=EN2=EN3=EN4=1, master clock input Vpp=1 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
ACT
ACT
ACT
ACT
ACT
ACT
SB
SB
) vs. supply voltage (V
) vs. supply voltage (V
) vs. master clock input voltage level (Vpp) (STCD1040, 2.8 V version,
) vs. input frequency (STCD1040, 2.8 V version,
) vs. supply voltage (V
) vs. master clock input voltage level (Vpp) (STCD1040, 1.8 V version,
) vs. input frequency (STCD1040, 1.8 V version,
Q
Q
Q
Q
) vs. supply voltage (V
load
) vs. supply voltage (V
) vs. temperature (STCD1040, 2.8 V version,
) vs. supply voltage (V
) vs. temperature (STCD1040, 1.8 V version,
= 20 pF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
load
load
= 30 pF, no master clock input) . . . . . . . . . . . . . . . . . . . . . 18
= 30 pF, no master clock input) . . . . . . . . . . . . . . . . . . . . 25
CC
CC
CC
CC
CC
CC
) (STCD1040, 2.8 V version,
) (STCD1040, 2.8 V version,
) (STCD1040, 1.8 V version,
) (STCD1040, 1.8 V version,
) (STCD1040, 1.8 V version,
) (STCD1040, 2.8 V version,
load
= 10 pF) . . . . . . . . . . . . . . . . . . . . . . . 24