w83194br-sd Winbond Electronics Corp America, w83194br-sd Datasheet - Page 17

• Manufacturer Part Number: w83194br-sd
• Description: Winbond Clock Generator For Intel P4 Springdale Series Chipset
• Manufacturer: Winbond Electronics Corp America

7.15 Register 14: Control (Default = 27H)
7.16 Register 15: Control (Default =3CH)
7.17 Register 16: Control (Default = 24H)
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
7
6
5
4
3
2
1
0
CLOCK GEN. FOR INTEL P4 SPRINGDALE/PRESCOTT SERIES CHIPSET
CPUT_DRI
SRCT_DRI
SPCNT [5]
SPCNT [4]
SPCNT [3]
SPCNT [2]
SPCNT [1]
SPCNT [0]
ASKEW [2]
ASKEW [1]
ASKEW [0]
INV_AGP
INV_CPU
INV_PCI
Reserve
Reserve
SPSP1
SPSP0
NAME
NAME
NAME
PWD
PWD
PWD
0
0
1
0
0
1
1
1
0
0
1
1
1
1
0
0
0
0
CPUT output state in during POWER DOWN or Stop mode assertion.
1: Driven (2*Iref), 0: Tristate (Floating)
CPUC always tri-state (floating) in power down Assertion.
SRC_T output state in during POWER DOWN or Stop mode assertion.
1: Driven (6*Iref), 0: Tristate (Floating)
SRC_C always tri-state (floating) in power down Assertion.
Spread Spectrum Programmable time, the resolution is 280ns.
Default period is 11.8us
Invert the CPU phase 0: Default, 1: Inverse
Reserved
Reserved
Spread Spectrum type select.
CPU to AGP skew control.
Invert the AGP phase 0: Default, 1: Inverse
Invert the PCI phase 0: Default, 1: Inverse
00: Down 1%
01: Down 0.5%
10: Center ±0.5%
11: Center ±0.25%
W83194BR-SD/W83194BG-SD
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DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: March, 22, 2006
Revision 1.2