vsc835 Vitesse Semiconductor Corp, vsc835 Datasheet - Page 4

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vsc835

Manufacturer Part Number
vsc835
Description
34x34 Crosspoint Switch With Signal Detection Semiconductor Corporation
Manufacturer
Vitesse Semiconductor Corp
Datasheet
2.5 Gbits/sec
34x34 Crosspoint Switch with Signal Detection
Page 4
asserting INTB, and the user must identify the offending channel by reading the monitor states. The interrupt
will be cleared when the corresponding activity monitor is read, but the monitor state will not be changed. If
multiple monitors have triggered the interrupt, it will persist until all the corresponding monitors have been
read.
required to distinguish noise on an unconnected signal (where both inputs float to the termination voltage) from
activity on a live signal. A minimum of two transitions defines activity. The threshold signal level is controlled
by the voltage on the VHYS pin. In order to keep the hysteresis in a useful range, it is recommended that VHYS
be nominally tied to VCC (useful range is 2.0V to VCC ).
AC Characteristics
Table 3: Data Path
note: Unless otherwise stated, all specifications are guaranteed but not tested.
note 1: Skew between any two input channels to a given output.
note 2: Skew between any two output channels from the same input channel.
note 3: Required for high-speed output rise/fall spec at F
note 4: Broadband jitter added to a jitter-free signal; jitter is primarily in the form of ISI for random data
Table 2: Memory Map
Address
22h, 23h
24h, 25h
26h, 27h
28h, 29h
Parameter
2Ah
If any change in a monitor state occurs after sampling by MONCLK, an interrupt will be signalled by
LOA requires a minimum signal level of 30-150mV peak-peak to recognize an input as active. This is
.
00h
01h
21h
T
T
F
...
t
t
OSKW
RATE
ISKW
R
R
t
, t
, t
jP
F
F
Access
R/W
R/W
R/W
R/O
R/O
R/O
R/O
R/O
...
Data rate
Input channel delay skew (1)
Output channel delay skew (2)
High-speed input rise/fall times, 20% to 80% (3)
High-speed output rise/fall times, 20% to 80%
Output data eye jitter, peak-peak, 2
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Output Y0’s programmed input channel (write and then assert CONFIG to program)
VITESSE
VITESSE SEMICONDUCTOR CORPORATION
SEMICONDUCTOR CORPORATION
Rx Signal monitor for inputs [A0-A3], [A4-A7]
Description
Rx Signal monitor for inputs [A16-A19], [A20-A23]
Rx Signal monitor for inputs [A24-A27], [A28-A31]
Rx Signal monitor for inputs [A8-A11], [A12-A15]
31
RATE
PRBS (4)
Output Y33’s programmed input channel
Rx Signal monitor for inputs [A32-A33]
Output Y1’s programmed input channel
=2.5 Gbits/s. For lower rate signals, use 0.375/F
Description
...
Min
-
-
-
-
-
-
(Logic ‘1’=No activity)
Typ
300
300
-
-
-
-
Max
150
150
100
2.5
-
-
RATE
VSC835
G52270-0, Rev. 4.1
Datasheet
Gbits/s
Units
ps
ps
ps
ps
ps
7/24/00

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