sy89610l Micrel Semiconductor, sy89610l Datasheet - Page 11

• Manufacturer Part Number: sy89610l
• Description: 3.3v, 77.75mhz To 694mhz Precision Frequency Synthesizer And Jitter Attenuator With Ultra-low Phase Noise
• Manufacturer: Micrel Semiconductor

Micrel, Inc.
Functional Description
Overall Function
The SY89610L is designed to accept a high-jitter
signal and provide an ultra-low jitter and ultra-low
phase noise CML compatible clock signal.
normal buffers, the SY89610L is a jitter attenuator
since it does not transfer jitter across from input to
output. This makes this product an ideal solution for
precision clock applications.
LC Voltage Control Oscillator (VCO)
The SY89610L uses an extremely low phase noise
VCO to prevent jitter at the output. At low frequencies,
the PLL produces more phase noise. To offset the
noise, the LC VCO provides an extremely low phase
noise signal that feeds to the output circuit. Unlike
many competitive VCOs, this VCO only requires a
single external component, which is a filter capacitor.
External Loop Filter Considerations
The SY89610L features an external PLL loop filter
that allows the user to tailor the PLLs behavior. It is
recommended that ceramic capacitors with NOP or
X7R dielectric be used because they have very low
effective series resistance. All other filter components
are on-chip. Internally, the filter has a resistor in series
with the external capacitor and a much smaller
capacitor in parallel with the series combination of the
internal resistor and external capacitor. The selectable
PLL bandwidths from 1kHz-to-10kHz allows the user
to select between different loop filter values. The
external capacitor must be placed as close to the
device pins as possible. While laying out the board,
keep any supply or signal traces lines away from the
capacitor. Loop filter capacitor layout should include a
quiet ground plane under the loop filter capacitor and
loop filter pins.
April 2008
Unlike
11
Power Supply Filtering Techniques
As with any high-speed integrated circuit, power
supply filtering is very important. At a minimum,
VDDA, VDD, and all VDDO pins should be individually
connected using via to the power supply plane, and
separate bypass capacitors should be used for each
pin. To achieve optimal jitter performance, each power
supply pin should use separate instances of the circuit
shown in Power Supply Scheme below.
Jitter Generation
Jitter generation is the amount of jitter generated by
the part at the output when there is no jitter present at
the input clock. While the VCO and PLL are sources
of jitter in a synthesizer, the different loop bandwidth
options
guarantees less than 2ps
subsection.
Phase Noise
The SY89610L has very low phase noise at 1kHz
offset from the center frequency. Phase noise is
measured at the output with a jitter-free signal injected
at the input. The loop bandwidth settings have a minor
impact on the phase noise values. For 10kHz loop
bandwidth, we guarantee the phase noise less than -
80dBc/Hz. See Phase Noise curve.
aid
in
Power Supply Scheme
[e-mail]
reducing
RMS
. See Jitter characteristics
jitter.
The
or [phone]
M9999-041708-C
SY89610L
SY89610L