mk1493-03b Integrated Device Technology, mk1493-03b Datasheet - Page 11

• Manufacturer Part Number: mk1493-03b
• Description: Pci Clock Generator
• Manufacturer: Integrated Device Technology

External Components
The MK1493-03B requires a minimum number of external
components for proper operation.
Decoupling Capacitor
Decoupling capacitors of 0.1µF and 0.001µF must be
connected between each VDD and GND (pins 12&9,
30&29, 40&41, 35&34, 6&5, 17&16, 14&15) as close to the
device as possible. For optimum device performance, the
decoupling capacitor should be mounted on the component
side of the PCB. Avoid the use of vias in the decoupling
circuit.
Series Termination Resistor
When the PCB trace between the clock outputs and the
loads are over 1 inch, series termination should be used. To
series terminate a 50Ω trace (a commonly used trace
impedance), place a 33Ω resistor in series with the clock
line, as close to the clock output pin as possible. The
nominal impedance of the clock output is 20Ω .
Crystal Information
The crystal used should be a fundamental mode (do not use
third overtone), parallel resonant. Crystal capacitors should
be connected from pins X1 to ground and X2 to ground to
optimize the initial accuracy. The value of these capacitors
is given by the following equation:
In the equation, C
crystal with a 16 pF load capacitance, two 20 pF [(16-6) x 2]
capacitors should be used.
Shared Pin Operation- Input/Output
Pins
The I/O pins designated by (input/output) serve as dual
signal functions to the device. During initial power-up, they
act as input pins. The logic level(voltage) that is present on
these pins at this time is read and stored into a 5-bit internal
data latch. At the end of Power-On reset, (see AC
characteristics for timing values), the device changes the
mode of operations for these pins to an output function. In
this mode the pins produce the specified buffered clocks to
external loads.
IDT™ PCI CLOCK GENERATOR
MK1493-03B
PCI CLOCK GENERATOR
Crystal caps (pF) = (C
L
is the crystal load capacitance. So, for a
L
- 6) x 2
11
Figure 1
To program (load) the internal configuration register for
these pins, a resistor is connected to either the VDD (logic
1) power supply or the GND (logic 0) voltage potential. A
10Kilo ohm (10 K) resistor is used to provide both the solid
CMOS programming voltage needed during the power-up
programming period and to provide an insignificant load on
the output clock during the subsequent operating period.
Figure 1 above shows a means of implementing this
function when a switch or 2-pin header is used. With no
jumpers installed the pin will be pulled high. With the jumper
in place the pin will be pulled low. If programmability is not
necessary, than only a single resistor is necessary. The
programming resistors should be located close to the series
termination resistor to minimize the current loop area. It is
more important to locate the series termination resistor
close to the driver than the programming resistor
Device
Pad
P rogramming
Header
V ia to G nd
S eries Term. R es.
MK1493-03B
CLOCK SYNTHESIZER
8.2K
2K
C lock trace to load
V ia to
V DD
REV H 051310