pi6c48545 Pericom Semiconductor Corporation, pi6c48545 Datasheet

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... LVDS outputs. The CLK inputs accept LVCMOS or LVTTL signals. The outputs are synchronized with input clock during asynchronous assertion/ deassertion of CLK_EN pin. PI6C48545 is ideal for single-ended LVTTL/LVCMOS to LVDS translations. Typical clock transla- tion and distribution applications are data-communications and telecommunications ...

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... LVTTL/LVCMOS to LVDS Fanout Buffer Description input. When low, selects CLK 1 Q through Min. Typ. Max Outputs Diasbled: Low Diasbled: High Disabled: Low Disabled: High Enabled Enabled Enabled Enabled HiZ PI6C48545 input. 0 Units pF kΩ HiZ PS8770 06/23/05 ...

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... Enabled Enabled Outputs HIGH LOW Conditions Referenced to GND Referenced to GND Referenced to GND Conditions 3 3.3V Low Skew 1-to-4 LVTTL/LVCMOS to LVDS Fanout Buffer Min. Typ. Max. 4.6 -0.5 V +0.5V CC -0.5 V +0.5V CC -65 150 Min. Typ. Max. 3.135 3.3 3.465 - PS8770 PI6C48545 Units Units 06/23/05 ...

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... Max -0.3 -0.3 = 3.465V -5 = 3.465V -150 Min. Typ. Max. 200 280 0 1.125 1.3 1.475 5 -10 -20 ±1 -3.5 -3.5 1.34 0.9 1.06 Min. Typ. Max. 650 0.8 2.2 40 300 100 300 48 52 PI6C48545 Units +0 1.3 V 0.8 V 150 Units 360 +10 µA + 1.6 V Units MHz PS8770 06/23/05 ...

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... Number of Transistors = TBD Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com LVTTL/LVCMOS to LVDS Fanout Buffer .169 4.3 .177 4.5 .047 1.20 SEATING Max PLANE .002 0.05 .006 0.15 Package Code L Pb-free & Green 20-pin 173-mil wide TSSOP 5 PI6C48545 3.3V Low Skew 1-to-4 .004 0.09 0.20 .008 0.45 .018 0.75 .030 .238 .269 6.1 6.7 Package Description PS8770 06/23/05 ...