s908qc16g0cdte Freescale Semiconductor, Inc, s908qc16g0cdte Datasheet - Page 140

• Manufacturer Part Number: s908qc16g0cdte
• Description: M68hc08 Family Of 8-bit Microcontroller Units Mcus
• Manufacturer: Freescale Semiconductor, Inc

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The monitor code has been updated from previous versions of the monitor code to allow enabling the
internal oscillator to generate the internal clock. This addition, which is enabled when IRQ is returned to
normal logic levels after a reset into monitor mode is entered, is intended to support serial communication
at 9600 baud in monitor mode by using the internal oscillator, and the internal oscillator user trim value
OSCTRIM (ROM location $FFC0) to generate the desired internal frequency (3.2 MHz). The IRQ pin must
remain at normal logic levels during the monitor session in order to maintain communication.
Table 15-1
may be entered after a power-on reset (POR).
The rising edge of the internal RST signal with V
monitor mode is latched, the values on PTA1 and PTA4 pins can be changed.
Once out of reset, the MCU waits for the host to send eight security bytes (see
security bytes, the MCU sends a break signal (10 consecutive 0s) to the host, indicating that it is ready to
receive a command.
140
2
3
5
1 μF
1 μF
DB9
+
+
1
3
4
5
shows the pin conditions for entering monitor mode. As specified in the table, monitor mode
7
8
C1+
C1–
C2+
C2–
Figure 15-10. Monitor Mode Circuit (External Clock, with High Voltage)
MAX232
V+
V–
16
15
2
10
6
1 μF
9
V
MC68HC08QY/QT Family Data Sheet, Rev. 2
DD
+
+
2
1 μF
74HC125
1
3
+
1 μF
74HC125
6
TST
4
10 kΩ
5
applied to IRQ latches the monitor mode. Once
V
V
DD
9.8304 MHz CLOCK
TST
10 kΩ
9.1 V
1 kΩ
*
V
DD
RST (PTA3)
OSC1 (PTA5)
IRQ (PTA2)
PTA0
15.3.2
Freescale Semiconductor
Security). After the
PTA1
PTA4
V
V
DD
SS
* Value not critical
10 kΩ
10 kΩ
V
DD
0.1 μF
*
*
V
DD