ltc4151 Linear Technology Corporation, ltc4151 Datasheet - Page 4

• Manufacturer Part Number: ltc4151
• Description: High Voltage I2c Current And Voltage Monitor
• Manufacturer: Linear Technology Corporation

LTC4151/LTC4151-1
SYMBOL
σ
f
t
R
I
I
V
V
I
V
I
V
V
I
f
t
t
t
t
t
t
t
t
t
t
t
C
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Internal clamps limit the SCL, SDA (LTC4151) and SDAI
(LTC4151-1) pins to a minimum of 5.5V. Driving these pins to voltages
beyond the clamp may damage the part. The pins can be safely tied to
higher voltages through a resistor that limits the current below 5mA.
ELECTRICAL CHARACTERISTICS
4
temperature range, otherwise specifi cations are at T
CONV
CONV
ADIN
2
ADR(IN)
SDA,SCL(IN)
2
SCL(MAX)
LOW
HIGH
BUF(MIN)
HD,STA(MIN)
SU,STA(MIN)
SU,STO(MIN)
HD,DATI(MIN)
HD,DATO(MIN)
SU,DAT(MIN)
SP(MAX)
RST
ADR(H)
ADR(L)
SDA(OL)
SDA,SCL(TH)
SDA,SCL(CL)
X
ADIN
C Interface
C Interface Timing (Note 4)
T
PARAMETER
Transition Noise
Conversion Rate (Continuous Mode)
Conversion Time (Snapshot Mode)
ADIN Pin Input Resistance
ADIN Pin Input Current
ADR0, ADR1 Input High Threshold
ADRO, ADRI Input Low Threshold
ADRO, ADRI Input Current
SDA, SDAO Output Low Voltage
SDA, SDAI, SDAO, SCL Input Current
SDA, SDAI, SCL Input Threshold
SDA, SDAI, SCL Clamp Voltage
Maximum SCL Clock Frequency
Minimum SCL Low Period
Minimum SCL High Period
Minimum Bus Free Time Between Stop/
Start Condition
Minimum Hold Time After (Repeated)
Start Condition
Minimum Repeated Start Condition
Set-Up Time
Minimum Stop Condition Set-Up Time
Minimum Data Hold Time Input
Minimum Data Hold Time Output
Minimum Data Set-Up Time Input
Maximum Suppressed Spike
Pulse Width
Stuck-Bus Reset Time
SCL, SDA Input Capacitance
A
= 25°C. V
CONDITIONS
(SENSE
V
ADIN
(SENSE
ADIN, V
ADIN = 3V
ADIN = 3V
ADR0, ADR1 = 0V or 3V
ADR0, ADR1 = 0.8V or 2.2V
I
SDA, SDAI, SDAO, SCL = 5V
I
SCL or SDA/SDAI Held Low
SDA
SDA
IN
The
, I
, I
SDAO
SDAI
+
+
IN
l
IN
– SENSE
– SENSE
, I
denotes the specifi cations which apply over the full operating
= 8mA
is from 7V to 80V, unless noted. (Note 3)
SCL
Note 3: All currents into pins are positive. All voltages are referenced to
GND, unless otherwise noted.
Note 4: Guaranteed by design and not subject to test.
Note 5: Integral nonlinearity and total unadjusted error of V
between 7V and 80V.
Note 6: Offset error of V
measured between 7V and 80V.
= 3mA
–
–
)
)
IN
is defi ned by extrapolating the straight line
l
l
l
l
l
l
l
l
l
l
l
l
l
MIN
400
300
2.3
0.3
1.6
5.5
53
26
±8
50
20
6
2
–100
2.65
0.15
0.65
0.12
TYP
140
600
110
1.2
0.3
7.5
0.6
1.8
6.1
22
67
33
10
50
30
30
30
33
0
5
MAX
±70
600
600
600
600
900
100
250
2.9
0.9
0.4
6.6
1.3
1.3
85
42
±2
±2
10
IN
9
2
0
are tested
mV
μV
μV
UNITS
41511f
RMS
RMS
RMS
MΩ
kHz
ms
ms
ms
Hz
μA
μA
μA
μA
μs
ns
μs
ns
ns
ns
ns
ns
ns
ns
pF
V
V
V
V
V