mcs7840 MosChip, mcs7840 Datasheet - Page 12

• Manufacturer Part Number: mcs7840
• Description: Usb-2.0 To Four Serial Ports
• Manufacturer: MosChip

Page 12
MCS7840
USB-2.0 to Four Serial Ports
FIFO Control Register (FCR):
The FCR controls the UART behavior in various modes.
In 550 Mode, the receiver FIFO trigger levels are
defi ned by FCR[7:6].
The interrupt trigger level & fl ow control trigger level
where appropriate are defi ned by L2 in the table.
L1 defi nes a lower fl ow control trigger level. The two
trigger levels used together introduce a hysteresis
element into the hardware RTS/CTS fl ow control.
In Byte Mode (450 Mode) trigger levels are all set to 1.
Register:
Description:
Offset:
Permissions:
Access Condition:
Default Value:
RHR Trigger Level
Bit[7]
[5:4]
[7:6]
Bit
0
1
2
3
FCR
FIFO Control Register
2
Write
0x00
Enable FIFO Mode
RHR Trigger Level
Bit[6]
Description
Flush RHR
Flush THR
Reserved
Reserved
Bit[5]
Reserved
Logic 0: Byte Mode
Logic 1: FIFO Mode
Logic 0: No change
Logic 1: Flushes the contents of RHR, This is operative
Logic 0: No change
Logic 1: Flushes the content of the THR, in the same
Bit[4]
only in FIFO mode. The RHR is automatically
fl ushed whenever changing between Byte Mode
and FIFO Mode. The bit will return to zero after
clearing the FIFO.
manner as FCR[1] does the RHR
FCR[7:6]
Reserved
2’b00
2’b01
2’b10
2’b11
Bit[3]
See Table Below
Operation
Reserved
Reserved
Bit[2]
Flush
THR
550 Mode (FIFO = 16)
L1
1
1
1
1
Bit[1]
Flush
RHR
L2
14
1
4
8
Rev.
Enable
FIFOs
Bit[0]
1.2