isl29003 Intersil Corporation, isl29003 Datasheet - Page 8

• Manufacturer Part Number: isl29003
• Description: Light-to-digital Output Sensor With High Sensitivity, Gain Selection, Interrupt Function And I2c Interface
• Manufacturer: Intersil Corporation

Gain/Range, Range(k)
The Gain/Range can be programmed in the control register
to give Range (k) determining the FSR. Note that Range(k)
is not the FSR. See Equation 3. Range(k) provides four
constants depending on programmed k that will be scaled by
R
adjusts the FSR. This function is especially useful when light
conditions are varying drastically while maintaining excellent
resolution.
Number of Clock Cycles, n-bit ADC
The number of clock cycles determines “n” in the n-bit ADC; 2
clock cycles is a n-bit ADC. n is programmable in the command
register in the width function. Depending on the application, a
good balance of speed, and resolution has to be considered
when deciding for n. For fast and quick measurement, choose
the smallest n = 4. For maximum resolution without regard of
time, choose n = 16. Table 12 compares the trade-off between
integration time and resolution. See Equations 10 and 11 for the
relation between integration time and n. See Equation 3 for the
relation of n and resolution.
External Scaling Resistor R
The ISL29003 uses an external resistor R
internal oscillator frequency, f
determines the f
device. f
proportional to R
constant is referenced to fixed constants 100kΩ and
655kHz:
fosc1
fosc2
R
TABLE 12. RESOLUTION AND INTEGRATION TIME
EXT
EXT
COUNTER is the number increments accrued for between
integration time for External Timing Mode.
f
set. This is nominally 327kHz when R
f
are set. This is nominally 655kHz when R
OSC
OSC
16
12
n
8
4
. See Table 9. Unlike R
= 100kΩ
=
=
1 is oscillator frequency when Range1 or Range2 are
2 is the oscillator frequency when Range3 or Range4
OSC
1
-- -
2
100kΩ
----------------- -
R
×
t
EXT
INT
100kΩ
----------------- -
SELECTION
R
12.8
0.05
200
, a dual speed mode oscillator, is inversely
0.8
EXT
(ms)
f
×
OSC
OSC
EXT
655
RANGE1
×
655
. For user simplicity, the proportionality
= 327kHz
, integration time and the FSR of the
kHz
RESOLUTION
LUX/COUNT
kHz
0.01
0.24
3.90
62.5
EXT
OSC
8
, Range(k) dynamically
EXT
. Consequently, R
t
INT
0.025
and f
100
6.4
0.4
EXT
(ms)
f
OSC
EXT
RANGE4
EXT
osc
is 100kΩ.
= 655kHz
RESOLUTION
(LUX/COUNT)
to fix its
is 100kΩ.
4000
250
EXT
16
1
(EQ. 7)
(EQ. 6)
ISL29003
n
When the Range/Gain bits are set to Range1 or Range2,
f
are set to Range3 and Range4.
f
The automatic f
improvement of signal-to-noise ratio when detecting very low
lux signals.
Integration Time or Conversion Time
Integration time is the period during which the device’s
analog-to-digital ADC converter samples the photodiode
current signal for a lux measurement. Integration time, in
other words, is the time to complete the conversion of analog
photodiode current into a digital signal (number of counts).
Integration time affects the measurement resolution. For
better resolution, use a longer integration time. For short and
fast conversions use a shorter integration time.
The ISL29003 offers user flexibility in the integration time to
balance resolution, speed and noise rejection. Integration time
can be set internally or externally and can be programmed in
the command register 00(hex) bit 5.
INTEGRATION TIME IN INTERNAL TIMING MODE
This timing mode is programmed in the command register
00(hex) bit 5. Most applications will be using this timing
mode. When using the Internal Timing Mode, f
n-bits resolution determine the integration time. t
function of the number of clock cycles and f
t
Since f
t
and n is:
t
t
OSC
OSC
int
int
int
int
n = 4, 8, 12, and16. n is the number of bits of resolution.
2
programmed at the command register 00(hex) bits 1 and 0.
t
for Internal Timing Mode and Gain/Range is set to Range1
or Range2.
t
for Internal Timing Mode and Gain/Range is set to Range3
or Range4.
1
int1
int2
2
is dual time. The integration time as a function of R
n
=
1
=
therefore is the number of clock cycles. n can be
=
runs at half speed compared to when Range/Gain bits
2
is the integration time when the device is configured
is the integration time when the device is configured
=
OSC
n
2
2
n
×
n
1
-- - f
2
×
×
----------
f
(
osc
1
--------------------------------------------- -
327kHz 100kΩ
--------------------------------------------- -
655kHz 100kΩ
OSC
is dual speed depending on the Gain/Range bit,
OSC
2
R
R
)
EXT
EXT
for Internal Timing Mode only
×
×
adjustment feature allows significant
OSC
OSC
.
int
October 8, 2007
is a
and
(EQ. 11)
(EQ. 10)
FN7464.3
(EQ. 8)
(EQ. 9)
EXT