sl4043b System Logic Semiconductor. co., sl4043b Datasheet

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sl4043b

Manufacturer Part Number
sl4043b
Description
Quad 3-state R/s Latch
Manufacturer
System Logic Semiconductor. co.
Datasheet
SL4043B
Quad 3-State R/S Latch
High-Voltage Silicon-Gate CMOS
latces. Each latch has a separate Q output and individual SET and
RESET inputs. The Q outputs are controlled by a common ENABLE
input. A logic “1” or high on the ENABLE input connects the latch
states to the Q outputs. A logic “0” or low on the ENABLE input
disconnects the latch states from the Q outputs, resulting in an open
circuit condition on the Q outputs. The open circuit feature allows
common busing of the outputs.
The SL4043B types are quad cross-coupled 3-state CMOS NOR
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1 A at 18 V over full package-
temperature range; 100 nA at 18 V and 25 C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
PIN 13 = NO CONNECTION
LOGIC DIAGRAM
PIN 8= GND
PIN 16=V
CC
T
X = don’t care
A
ORDERING INFORMATION
X
H
H
S
L
L
= -55 to 125 C for all packages
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
SL4043BN Plastic
SL4043BD SOIC
R
X
H
H
L
L
SLS
OE
H
H
H
H
L
System Logic
Semiconductor
Impedance
No change
Outputs
High
Q
H
H
L

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sl4043b Summary of contents

Page 1

... SL4043B Quad 3-State R/S Latch High-Voltage Silicon-Gate CMOS The SL4043B types are quad cross-coupled 3-state CMOS NOR latces. Each latch has a separate Q output and individual SET and RESET inputs. The Q outputs are controlled by a common ENABLE input. A logic “1” or high on the ENABLE input connects the latch states to the Q outputs. A logic “ ...

Page 2

... OUT CC Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V Unused outputs must be left open. System Logic SLS Semiconductor SOIC Package+ Parameter and V IN OUT SL4043B Value Unit -0.5 to + 750 ...

Page 3

... SL4043B DC ELECTRICAL CHARACTERISTICS Symbol Parameter V Minimum High-Level IH Input Voltage V Maximum Low -Level IL Input Voltage V Minimum High-Level OH Output Voltage V Maximum Low-Level OL Output Voltage I Maximum Input IN Leakage Current I Maximum Three State OZ Leakage Current I Maximum Quiescent CC Supply Current (per Package) I Minimum Output Low OL (Sink) Current ...

Page 4

... R =200 k , Input t =t =20 ns -55 C 5.0 160 Figure 2. Switching Waveforms SL4043B =t =20 ns Guaranteed Limit 25 C 125 C Unit 300 600 ns 140 280 100 200 230 460 ns 110 220 80 160 180 360 ns 100 200 ...

Page 5

... SL4043B Figure 3. Switching Waveforms System Logic SLS Semiconductor ...

Page 6

... Figure 4. Test Circuit EXPANDED LOGIC DIAGRAM System Logic SLS Semiconductor TEST PHZ t GND PLZ t V PZH t GND PZL ( 1/4 of the Device) SL4043B IN A GND GND GND GND ...

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