scc2681 NXP Semiconductors, scc2681 Datasheet - Page 23

• Manufacturer Part Number: scc2681
• Description: Dual Asynchronous Receiver/transmitter Duart
• Manufacturer: NXP Semiconductors

Philips Semiconductors
TIMING DIAGRAMS
2004 Apr 06
NOTES:
1. INTRN or OP3 – OP7 when used as interrupt outputs.
2. The test for open-drain outputs is intended to guarantee switching of the output transistor. Measurement of this response is referenced from themidpoint of the switching signal, V
Dual asynchronous receiver/transmitter (DUART)
point 0.5V above V
and can greatly affect the resultant measurement.
NOTE:
C1 AND C2 SHOULD BE BASED ON MANUFACTURER’S SPECIFICATION. PARASITIC CAPACITANCE SHOULD
BE INCLUDED WITH C1 AND C2. R1 IS ONLY REQUIRED IF U1 WILL NOT DRIVE TO X1 INPUT LEVELS
X1/CLK
CTCLK
RxC
TxC
OL
. This point represents noise margin that assures true switching has occurred. Beyond this level, the effects of external circuitry and test environment are pronounced
(Continued)
C1 = C2 = 24 pF FOR C
FREQUENCY:
LOAD CAPACITANCE (C
TYPE OF OPERATION:
t
t
CLK
CTC
t
t
Rx
Tx
3.6864 MHz
L
= 20 pF
INTERRUPT
OUTPUT
L
TYPICAL CRYSTAL SPECIFICATION
WRN
):
RDN
Figure 6. Interrupt Timing
X1
X2
OR
Figure 7. Clock Timing
1
t
t
CLK
CTC
t
t
Rx
Tx
2 – 4 MHz
12 – 32 pF
PARALLEL RESONANT, FUNDAMENTAL MODE
SCC2681
23
4 pF
3 pF
50 TO
150 k
V
t
M
IR
RESISTOR REQUIRED
WHEN U1 IS A TTL DEVICE
V
OL
V
+0.5V
U1
OL
TO INTERNAL CLOCK DRIVERS
+5 V
1 k
R1
NC
SD00724
SCC2681
X1
X2
Product data
SD00090
M
, to a