74LVC109D,112 NXP Semiconductors, 74LVC109D,112 Datasheet - Page 10

IC DUAL JK F-F POS-EDGE 16SOIC

74LVC109D,112

Manufacturer Part Number
74LVC109D,112
Description
IC DUAL JK F-F POS-EDGE 16SOIC
Manufacturer
NXP Semiconductors
Series
74LVCr
Type
JK Typer
Datasheet

Specifications of 74LVC109D,112

Function
Set(Preset) and Reset
Output Type
Differential
Number Of Elements
2
Number Of Bits Per Element
1
Frequency - Clock
150MHz
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Delay Time - Propagation
-
Other names
74LVC109D
74LVC109D
935191050112
Philips Semiconductors
Notes
1. All typical values are measured at T
2. These typical values are measured at V
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed
2004 Mar 18
SYMBOL
T
t
t
t
t
t
t
t
f
t
PHL
PLH
PHL
W
rem
su
h
max
sk(0)
amb
Dual JK flip-flop with set and reset;
positive-edge trigger
by design.
/t
PLH
= 40 to 125 C
propagation delay nCP to nQ and
nCP to nQ
propagation delay nSD to nQ and
nRD to nQ
propagation delay nSD to nQ and
nRD to nQ
clock pulse width HIGH or LOW
set or reset pulse width HIGH or
LOW
removal time nSD, nRD to nCP
set-up time nJ and nK to CP
hold time nJ and nK to nCP
maximum clock pulse frequency
skew
PARAMETER
amb
= 25 C.
CC
= 3.3 V.
see Figs 6 and 8 2.7
see Figs 7 and 8 2.7
see Figs 7 and 8 2.7
see Fig. 6
see Fig. 7
see Fig. 7
see Fig. 6
see Fig. 6
see Fig. 6
note 3
WAVEFORMS
TEST CONDITIONS
10
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
V
CC
(V)
1.5
1.0
1.5
1.0
1.5
1.0
3.3
3.0
3.0
2.5
2.0
150
MIN.
TYP.
Product specification
74LVC109
9.5
8.5
10.5
9.0
9.0
8.5
1.5
MAX.
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
UNIT

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