74HC107D,652 NXP Semiconductors, 74HC107D,652 Datasheet - Page 6

• Manufacturer Part Number: 74HC107D,652
• Description: IC DUAL JK F-F NEG-EDGE 14SOIC
• Manufacturer: NXP Semiconductors
• Series: 74HCr
• Type: JK Typer

Specifications of 74HC107D,652

• Function: Reset
• Output Type: Differential
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Frequency - Clock: 85MHz
• Delay Time - Propagation: 15ns
• Trigger Type: Negative Edge
• Voltage - Supply: 2 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output High, Low: -
• Other names: 74HC107D; 74HC107D; 933713920652

Philips Semiconductors
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
Output capability: standard
I
Note to HCT types
The value of additional quiescent supply current ( I
To determine I
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
December 1990
CC
INPUT
nK
nR
nCP, nJ
SYMBOL PARAMETER
t
t
t
t
t
t
t
t
t
f
PHL
PHL
PHL
THL
W
W
rem
su
h
max
Dual JK flip-flop with reset; negative-edge trigger
category: flip-flops
/ t
/ t
/ t
/ t
TLH
PLH
PLH
PLH
propagation delay
propagation delay
propagation delay
output transition time
clock pulse width
reset pulse width
removal time
set-up time
hold time
maximum clock pulse
f
LOW
= t
nCP to nQ
nCP to nQ
nR to nQ, nQ
HIGH or LOW
nR to nCP
nJ, nK to nCP
nJ, nK to nCP
frequency
CC
f
UNIT LOAD COEFFICIENT
= 6 ns; C
per input, multiply this value by the unit load coefficient shown in the table below.
L
= 50 pF
0.60
0.65
1.00
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
16
20
14
20
5
30
min.
19
21
20
7
9
11
8
7
66
typ.
2
25
CC
36
36
38
15
max. min. max. min. max.
) for a unit load of 1 is given in the family specifications.
T
74HCT
amb
6
20
25
18
25
5
24
40 to 85
( C)
45
45
48
19
24
30
21
30
5
20
40 to 125
54
54
57
22
.
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
UNIT
74HC/HCT107
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
V
TEST CONDITIONS
(V)
Product specification
CC
WAVEFORMS
Fig.6
Fig.6
Fig.7
Fig.6
Fig.6
Fig.7
Fig.7
Fig.6
Fig.6
Fig.6